mirror of
https://github.com/Evolution-X-Devices/device_google_taimen
synced 2026-01-28 17:12:52 +00:00
d9e25c455e
Bug: 122034690
Test: Check UID Manually
Change-Id: I65b4b8c9a6533e722028ff1c665c75c6b03055df
(cherry picked from commit 0881758b0b)
330 lines
11 KiB
Plaintext
330 lines
11 KiB
Plaintext
## This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn547)
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## and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn547)
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###############################################################################
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# Application options
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# Logging Levels
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# NXPLOG_DEFAULT_LOGLEVEL 0x01
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# ANDROID_LOG_DEBUG 0x03
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# ANDROID_LOG_WARN 0x02
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# ANDROID_LOG_ERROR 0x01
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# ANDROID_LOG_SILENT 0x00
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NXPLOG_EXTNS_LOGLEVEL=0x01
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NXPLOG_NCIHAL_LOGLEVEL=0x01
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NXPLOG_NCIX_LOGLEVEL=0x01
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NXPLOG_NCIR_LOGLEVEL=0x01
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NXPLOG_FWDNLD_LOGLEVEL=0x01
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NXPLOG_TML_LOGLEVEL=0x01
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NFC_DEBUG_ENABLED=0
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###############################################################################
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# Nfc Device Node name
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NXP_NFC_DEV_NODE="/dev/nq-nci"
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###############################################################################
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# Extension for Mifare reader enable
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MIFARE_READER_ENABLE=0x01
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###############################################################################
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# Firmware file type
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#.so file 0x01
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#.bin file 0x02
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NXP_FW_TYPE=0x01
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###############################################################################
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# System clock source selection configuration
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#define CLK_SRC_XTAL 1
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#define CLK_SRC_PLL 2
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NXP_SYS_CLK_SRC_SEL=0x01
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###############################################################################
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# System clock frequency selection configuration
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#define CLK_FREQ_13MHZ 1
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#define CLK_FREQ_19_2MHZ 2
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#define CLK_FREQ_24MHZ 3
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#define CLK_FREQ_26MHZ 4
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#define CLK_FREQ_38_4MHZ 5
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#define CLK_FREQ_52MHZ 6
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NXP_SYS_CLK_FREQ_SEL=0x00
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###############################################################################
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# The timeout value to be used for clock request acknowledgment
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# min value = 0x01 to max = 0x06
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NXP_SYS_CLOCK_TO_CFG=0x01
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###############################################################################
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# NXP proprietary settings
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NXP_ACT_PROP_EXTN={2F, 02, 00}
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###############################################################################
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# NFC forum profile settings
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NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
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###############################################################################
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# NXP TVDD configurations settings
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# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
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# out of them only one can be configured at a time.
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NXP_EXT_TVDD_CFG=0x02
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###############################################################################
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#config1:SLALM, 3.3V for both RM and CM
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NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
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###############################################################################
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#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
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#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
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NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, BA, 1E, 15, 00, D0, 0C}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_1={ 20, 02, A8, 14,
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A0, 0D, 06, 06, 37, 08, 76, 00, 00,
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A0, 38, 04, 14, 0B, 0B, 00,
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A0, 0D, 03, 24, 03, 7F,
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A0, 0D, 06, 06, 42, 00, 00, F2, F2,
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A0, 0D, 04, 32, 42, FC, 40,
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A0, 0D, 04, 46, 42, 68, 40,
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A0, 0D, 04, 56, 42, 78, 40,
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A0, 0D, 04, 5C, 42, 80, 40,
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A0, 0D, 06, 34, 44, 66, 0A, 00, 00,
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A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
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A0, 0D, 06, 58, 44, 55, 08, 00, 00,
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A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
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A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
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A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
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A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01,
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A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
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A0, 0D, 06, 32, 4A, 53, 07, 00, 1B,
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A0, 0D, 06, 46, 4A, 33, 07, 00, 07,
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A0, 0D, 06, 56, 4A, 43, 07, 00, 07,
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A0, 0D, 06, 5C, 4A, 11, 07, 01, 07
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_2={ 20, 02, 26, 02,
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A0, 3A, 08, 0E, 01, 0E, 01, 0E, 01, 0E, 01,
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A0, 29, 17, 1C, 02, 00, 1F, 00, 02, 00, 1F, 00, 02, 00, 40, F3, F3, 00, 43, F3, F3, 38, 70, 00, 00, 01
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_3={20, 02, D6, 01,
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A0, 34, D2, 23, 04, 18,
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07,
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40,
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00, 20, 40, 00,
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2D, 20, 40, 00,
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32, 20, 40, 00,
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3B, 20, 40, 00,
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5C, 20, 40, 00,
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9A, 00, 60, 00,
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AE, 00, 70, 00,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 48, 01,
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00, 00, 08, 03,
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00, 00, 08, 01,
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00, 00, C8, 02,
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00, 00, C8, 00,
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00, 00, 88, 02,
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00, 00, 48, 02,
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00, 00, B8, 00,
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00, 00, 68, 00,
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00, 00, 18, 00,
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00, 00, 08, 02,
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00, 00, 00, 00,
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00, 00, 00, 00,
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07,
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00, 20, 40, 00,
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2D, 20, 40, 00,
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32, 20, 40, 00,
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3B, 20, 40, 00,
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5C, 20, 40, 00,
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9A, 00, 60, 00,
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AE, 00, 70, 00,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 08, 02,
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00, 00, 48, 01,
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00, 00, 08, 03,
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00, 00, 08, 01,
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00, 00, C8, 02,
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00, 00, C8, 00,
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00, 00, 88, 02,
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00, 00, 48, 02,
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00, 00, B8, 00,
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00, 00, 68, 00,
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00, 00, 18, 00,
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00, 00, 08, 02,
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00, 00, 00, 00
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_4={ 20, 02, 5B, 01,
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A0, 0B, 57, 05, 85, 90, 78, 0F, 4E, 00, 3D, 95,
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00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00,
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00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 1F, 00, 00,
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6E, 1F, 00, 00, 72, 1F, 00, 00, 79, 1F, 00, 00, 7B,
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1F, 00, 00, 84, 1F, 00, 00, 86, 1F, 00, 00, 8F, 1F,
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00, 00, 91, 1F, 00, 00, 9A, 1F, 00, 00, A1, 1F, 00,
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00, A7, 1F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_5={
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_6={
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#}
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###############################################################################
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# Core configuration extensions
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# It includes
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# Wired mode settings A0ED, A0EE
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# Tag Detector A040, A041, A043
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# Low Power mode A007
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# Clock settings A002, A003
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# PbF settings A008
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# Clock timeout settings A004
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# eSE (SVDD) PWR REQ settings A0F2
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# Window size A0D8
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# DWP Speed A0D5
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# How eSE connected to PN553 A012
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# UICC2 bit rate A0D1
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# SWP1A interface A0D4
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# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
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NXP_CORE_CONF_EXTN={20, 02, 32, 0C,
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A0, EC, 01, 01,
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A0, ED, 01, 01,
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A0, 5E, 01, 01,
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A0, 12, 01, 02,
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A0, 40, 01, 05,
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A0, 41, 01, 05,
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A0, 43, 01, 04,
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A0, D1, 01, 02,
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A0, D4, 01, 00,
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A0, DD, 01, 2D,
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A0, 37, 01, 35,
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A0, 08, 02, 00, 81
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}
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# A0, F2, 01, 01,
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# A0, 40, 01, 01,
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# A0, 41, 01, 02,
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# A0, 43, 01, 04,
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# A0, 02, 01, 01,
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# A0, 03, 01, 11,
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# A0, 07, 01, 03,
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# A0, 08, 01, 01
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# }
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###############################################################################
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# Core configuration rf field filter settings to enable set to 01 to disable set
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# to 00 last bit
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NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 }
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###############################################################################
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# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
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# to 0x00
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NXP_I2C_FRAGMENTATION_ENABLED=0x00
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###############################################################################
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# Core configuration settings
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NXP_CORE_CONF={ 20, 02, 2D, 0F,
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85, 01, 01,
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28, 01, 00,
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21, 01, 00,
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30, 01, 08,
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31, 01, 03,
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32, 01, 60,
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38, 01, 01,
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33, 00,
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54, 01, 06,
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50, 01, 02,
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5B, 01, 00,
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80, 01, 01,
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81, 01, 01,
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82, 01, 0E,
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18, 01, 01
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}
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###############################################################################
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#Enable SWP full power mode when phone is power off
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NXP_SWP_FULL_PWR_ON=0x00
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###############################################################################
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#Set the default Felica T3T System Code OffHost route Location :
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_SYS_CODE_ROUTE=0x00
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###############################################################################
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#Set the default Felica T3T System Code :
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DEFAULT_SYS_CODE={FE,FF}
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###############################################################################
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# AID Matching platform options
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# AID_MATCHING_L 0x01
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# AID_MATCHING_K 0x02
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AID_MATCHING_PLATFORM=0x01
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###############################################################################
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#CHINA_TIANJIN_RF_SETTING
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#Enable 0x01
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#Disable 0x00
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NXP_CHINA_TIANJIN_RF_ENABLED=0x01
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###############################################################################
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#SWP_SWITCH_TIMEOUT_SETTING
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# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
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# Timeout in milliseconds, for example
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# No Timeout 0x00
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# 10 millisecond timeout 0x0A
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NXP_SWP_SWITCH_TIMEOUT=0x0A
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##############################################################################
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# Extended APDU length for ISO_DEP
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ISO_DEP_MAX_TRANSCEIVE=0xFEFF
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###############################################################################
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# Vendor Specific Proprietary Protocol & Discovery Configuration
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# Set to 0xFF if unsupported
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# byte[0] NCI_PROTOCOL_18092_ACTIVE
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# byte[1] NCI_PROTOCOL_B_PRIME
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# byte[2] NCI_PROTOCOL_DUAL
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# byte[3] NCI_PROTOCOL_15693
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# byte[4] NCI_PROTOCOL_KOVIO
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# byte[5] NCI_PROTOCOL_MIFARE
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# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
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# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
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# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
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NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, 70, FF, FF}
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###############################################################################
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# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
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# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
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# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
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# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
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# command is sent waiting for rsp and ntf.
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PRESENCE_CHECK_ALGORITHM=2
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###############################################################################
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