Vineet Gupta 1097163870 ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoff ...

The increment of delay counter was 2 instructions:
Arithmatic Shfit Left (ASL) + set to 1 on overflow

This can be done in 1 using ROtate Left (ROL)

Suggested-by: Nigel Topham <ntopham@synopsys.com>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

2015-08-07 13:56:16 +05:30

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arcregs.h

ARCv2: Fix the peripheral address space detection

2015-08-03 19:34:07 +05:30

asm-offsets.h

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atomic.h

ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoff

2015-08-07 13:56:16 +05:30

barrier.h

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bitops.h

ARC: Make ARC bitops "safer" (add anti-optimization)

2015-07-09 17:36:32 +05:30

bug.h

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cache.h

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cacheflush.h

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checksum.h

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clk.h

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cmpxchg.h

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current.h

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delay.h

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disasm.h

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dma-mapping.h

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dma.h

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elf.h

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entry-arcv2.h

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entry-compact.h

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entry.h

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exec.h

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futex.h

ARC: Add llock/scond to futex backend

2015-07-09 17:36:33 +05:30

io.h

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irq.h

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irqflags-arcv2.h

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irqflags-compact.h

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irqflags.h

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Kbuild

mm: clean up per architecture MM hook header files

2015-07-17 16:39:53 -07:00

kdebug.h

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kgdb.h

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kprobes.h

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linkage.h

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mach_desc.h

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mcip.h

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mmu_context.h

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mmu.h

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module.h

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mutex.h

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page.h

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perf_event.h

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pgalloc.h

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pgtable.h

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processor.h

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ptrace.h

ARC: Make pt_regs regs unsigned

2015-08-05 11:48:21 +05:30

sections.h

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segment.h

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serial.h

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setup.h

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shmparam.h

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smp.h

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spinlock_types.h

ARC: LLOCK/SCOND based rwlock

2015-08-04 09:26:33 +05:30

spinlock.h

ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoff

2015-08-07 13:56:16 +05:30

stacktrace.h

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string.h

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switch_to.h

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syscall.h

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syscalls.h

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thread_info.h

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timex.h

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tlb-mmu1.h

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tlb.h

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tlbflush.h

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uaccess.h

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unaligned.h

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unwind.h

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