&soc {
	pcie0: qcom,pcie@1bf0000 {
		status = "disabled";
		reg = <0x01bf0000 0x4000>,
			<0x01bf6000 0x2000>,
			<0x48000000 0xf1d>,
			<0x48000f20 0xa8>,
			<0x48001000  0x1000>,
			<0x48100000 0x100000>,
			<0x1bf4000 0x1000>,
			<0x1bf5000 0x1000>;
		reg-names = "parf", "phy", "dm_core", "elbi", "iatu",
				"conf", "mhi", "rumi";
		qcom,target-link-speed = <0x1>;
		qcom,link-check-max-count = <200>; /* 1 sec */
		qcom,no-l1-supported;
		qcom,no-l1ss-supported;
		qcom,no-l0s-supported;
		qcom,no-aux-clk-sync;
	};

	usb_nop_phy: usb_nop_phy {
		compatible = "usb-nop-xceiv";
	};

	usb_emuphy: phy@a71c000 {
		compatible = "qcom,usb-emu-phy";
		reg = <0xA71C000 0x9500>;

		qcom,emu-init-seq = <0xfff0 0x4
					0xfff3 0x4
					0xfff0 0x4
					0x100000 0x20
					0x0 0x20
					0x1e0 0x20
					0x100000 0x3c
					0x0 0x3c
					0x4 0x3c
					0x0 0x4
					0x9 0x14>;
	};

	bi_tcxo: bi_tcxo {
		compatible = "fixed-factor-clock";
		clock-mult = <1>;
		clock-div = <2>;
		clocks = <&xo_board>;
		#clock-cells = <0>;
	};

	bi_tcxo_ao: bi_tcxo_ao {
		compatible = "fixed-factor-clock";
		clock-mult = <1>;
		clock-div = <2>;
		clocks = <&xo_board>;
		#clock-cells = <0>;
	};
};

&qupv3_se3_2uart {
	qcom,rumi_platform;
};

&gcc {
	clocks = <&bi_tcxo>, <&pcie_pipe_clk>, <&sleep_clk>;
};

&usb0 {
	dwc3@a600000 {
		usb-phy = <&usb_emuphy>, <&usb_nop_phy>;
		dr_mode = "peripheral";
	};
};

&debugcc {
	clocks = <&bi_tcxo>, <&gcc 0>;
};

&cpufreq_hw {
	clocks = <&bi_tcxo>, <&gcc GPLL0>;
};

&rpmhcc {
	compatible = "qcom,dummycc";
	clock-output-names = "rpmhcc_clocks";
};
