#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/input/qcom,qpnp-power-on.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>


&spmi_bus {
	#address-cells = <2>;
	#size-cells = <0>;
	interrupt-controller;
	#interrupt-cells = <4>;

	pm8775_1: qcom,pm8775@0 {
		compatible = "qcom,spmi-pmic";
		reg = <0 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pm8775_1_tz: qcom,temp-alarm@a00 {
			compatible = "qcom,spmi-temp-alarm";
			reg = <0xa00>;
			interrupts = <0x0 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
			#thermal-sensor-cells = <0>;
		};

		pon_pbs@800 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x800>;
			qcom,system-reset;
			qcom,store-hard-reset-reason;
		};

		pon_hlos@1200 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x1200>, <0x800>;
			reg-names = "pon_hlos", "pon_pbs";
			interrupts = <0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>,
				     <0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
			interrupt-names = "kpdpwr", "resin";
			qcom,kpdpwr-sw-debounce;

			qcom,pon_1 {
				qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>;
				linux,code = <KEY_POWER>;
			};

			qcom,pon_2 {
				qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>;
				linux,code = <KEY_VOLUMEDOWN>;
			};
		};

		pm8775_1_clkdiv: clock-controller@5700 {
			compatible = "qcom,spmi-clkdiv";
			reg = <0x5700>;
			#clock-cells = <1>;
			qcom,num-clkdivs = <2>;
			clock-output-names = "pm8775_1_div_clk1",
						"pm8775_1_div_clk2";
			clocks = <&rpmhcc RPMH_CXO_CLK>;
			clock-names = "xo";
		};

		pm8775_1_rtc: qcom,pm8775_1_rtc {
			compatible = "qcom,pmk8350-rtc";
			reg = <0x6100>, <0x6200>;
			reg-names = "rtc", "alarm";
			interrupts = <0x0 0x62 0x1 IRQ_TYPE_NONE>;
		};

		pm8775_1_gpios: pinctrl@8800 {
			compatible = "qcom,pm8775-gpio";
			reg = <0x8800>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		pm8775_1_sdam_2: sdam@7100 {
			compatible = "qcom,spmi-sdam";
			reg = <0x7100>;
			#address-cells = <1>;
			#size-cells = <1>;
		};

		pm8775_1_sdam_5: sdam@7400 {
			compatible = "qcom,spmi-sdam";
			reg = <0x7400>;
			#address-cells = <1>;
			#size-cells = <1>;
		};
	};

	/* below definitions are for the second instance of pm8775 */
	pm8775_2: qcom,pm8775@2 {
		compatible = "qcom,spmi-pmic";
		reg = <2 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pm8775_2_tz: qcom,temp-alarm@a00 {
			compatible = "qcom,spmi-temp-alarm";
			reg = <0xa00>;
			interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
			#thermal-sensor-cells = <0>;
		};

		pon_pbs@800 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x800>;
		};

		pon_hlos@1200 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x1200>, <0x800>;
			reg-names = "pon_hlos", "pon_pbs";
		};

		pm8775_2_clkdiv: clock-controller@5700 {
			compatible = "qcom,spmi-clkdiv";
			reg = <0x5700>;
			#clock-cells = <1>;
			qcom,num-clkdivs = <2>;
			clock-output-names = "pm8775_2_div_clk1",
						"pm8775_2_div_clk2";
			clocks = <&rpmhcc RPMH_CXO_CLK>;
			clock-names = "xo";
		};

		pm8775_2_gpios: pinctrl@8800 {
			compatible = "qcom,pm8775-gpio";
			reg = <0x8800>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};

	/* below definitions are for the third instance of pm8775 */
	pm8775_3: qcom,pm8775@4 {
		compatible = "qcom,spmi-pmic";
		reg = <4 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pm8775_3_tz: qcom,temp-alarm@a00 {
			compatible = "qcom,spmi-temp-alarm";
			reg = <0xa00>;
			interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
			#thermal-sensor-cells = <0>;
		};

		pon_pbs@800 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x800>;
		};

		pon_hlos@1200 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x1200>, <0x800>;
			reg-names = "pon_hlos", "pon_pbs";
		};

		pm8775_3_clkdiv: clock-controller@5700 {
			compatible = "qcom,spmi-clkdiv";
			reg = <0x5700>;
			#clock-cells = <1>;
			qcom,num-clkdivs = <2>;
			clock-output-names = "pm8775_3_div_clk1",
						"pm8775_3_div_clk2";
			clocks = <&rpmhcc RPMH_CXO_CLK>;
			clock-names = "xo";
		};

		pm8775_3_gpios: pinctrl@8800 {
			compatible = "qcom,pm8775-gpio";
			reg = <0x8800>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};

	/* below definitions are for the fourth instance of pm8775 */
	pm8775_4: qcom,pm8775@6 {
		compatible = "qcom,spmi-pmic";
		reg = <6 SPMI_USID>;
		#address-cells = <1>;
		#size-cells = <0>;

		pm8775_4_tz: qcom,temp-alarm@a00 {
			compatible = "qcom,spmi-temp-alarm";
			reg = <0xa00>;
			interrupts = <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
			#thermal-sensor-cells = <0>;
		};

		pon_pbs@800 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x800>;
		};

		pon_hlos@1200 {
			compatible = "qcom,qpnp-power-on";
			reg = <0x1200>, <0x800>;
			reg-names = "pon_hlos", "pon_pbs";
		};

		pm8775_4_clkdiv: clock-controller@5700 {
			compatible = "qcom,spmi-clkdiv";
			reg = <0x5700>;
			#clock-cells = <1>;
			qcom,num-clkdivs = <2>;
			clock-output-names = "pm8775_4_div_clk1",
						"pm8775_4_div_clk2";
			clocks = <&rpmhcc RPMH_CXO_CLK>;
			clock-names = "xo";
		};

		pm8775_4_gpios: pinctrl@8800 {
			compatible = "qcom,pm8775-gpio";
			reg = <0x8800>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};
};
