&soc {
	tpdm_swao_prio0: tpdm@10b09000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10b09000 0x1000>;
		reg-names = "tpdm-base";

		atid = <71>;
		coresight-name = "coresight-tpdm-swao-prio-0";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_swao_prio0_out_tpda_aoss: endpoint {
					remote-endpoint =
					<&tpda_aoss_in_tpdm_swao_prio0>;
				};
			};
		};
	};

	tpdm_swao_prio1: tpdm@10b0a000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10b0a000 0x1000>;
		reg-names = "tpdm-base";

		atid = <71>;
		coresight-name = "coresight-tpdm-swao-prio-1";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_swao_prio1_out_tpda_aoss: endpoint {
					remote-endpoint =
					<&tpda_aoss_in_tpdm_swao_prio1>;
				};
			};
		};
	};

	tpdm_swao_prio2: tpdm@10b0b000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10b0b000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-swao-prio-2";
		atid = <71>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_swao_prio2_out_tpda_aoss: endpoint {
					remote-endpoint =
					<&tpda_aoss_in_tpdm_swao_prio2>;
				};
			};
		};
	};

	tpdm_swao_prio3: tpdm@10b0c000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10b0c000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-swao-prio-3";

		atid = <71>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_swao_prio3_out_tpda_aoss: endpoint {
					remote-endpoint =
					<&tpda_aoss_in_tpdm_swao_prio3>;
				};
			};
		};
	};

	tpdm_ddr_ch01: tpdm@10d10000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10d10000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-ddr_ch01";
		atid = <80>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_ddr_ch01_out_funnel_ddr_ch_01: endpoint {
					remote-endpoint =
					<&funnel_ddr_ch_01_in_tpdm_ddr_ch01>;
				};
			};
		};
	};

	tpdm_ddr_ch23: tpdm@10d20000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10d20000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-ddr_ch23";
		atid = <80>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_ddr_ch23_out_funnel_ddr_ch_23: endpoint {
					remote-endpoint =
					<&funnel_ddr_ch_23_in_tpdm_ddr_ch23>;
				};
			};
		};
	};

	tpdm_ddr_ch45: tpdm@10d40000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10d40000 0x1000>;
		reg-names = "tpdm-base";
		atid = <80>;
		coresight-name = "coresight-tpdm-ddr_ch45";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_ddr_ch45_out_funnel_ddr_ch_45: endpoint {
					remote-endpoint =
					<&funnel_ddr_ch_45_in_tpdm_ddr_ch45>;
				};
			};
		};
	};

	tpdm_ddr_ch67: tpdm@10d50000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10d50000 0x1000>;
		reg-names = "tpdm-base";
		atid = <80>;
		coresight-name = "coresight-tpdm-ddr_ch67";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_ddr_ch67_out_funnel_ddr_ch_67: endpoint {
					remote-endpoint =
					<&funnel_ddr_ch_67_in_tpdm_ddr_ch67>;
				};
			};
		};
	};

	tpdm_ddr0: tpdm@10d00000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10d00000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-ddr0";
		atid = <80>;
		clocks = <&aoss_qmp>;
		status = "disabled";
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_ddr0_out_tpda_ddr: endpoint {
					remote-endpoint =
					<&tpda_ddr_in_tpdm_ddr0>;
				};
			};
		};
	};

	tpdm_ddr1: tpdm@10d01000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10d01000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-ddr1";
		atid = <80>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
		status = "disabled";

		out-ports {
			port {
				tpdm_ddr1_out_tpda_ddr: endpoint {
					remote-endpoint =
					<&tpda_ddr_in_tpdm_ddr1>;
				};
			};
		};
	};

	tpdm_prng: tpdm@10841000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10841000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-prng";
		atid = <78>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_prng_out_tpda_dl_center: endpoint {
					remote-endpoint =
					<&tpda_dl_center_in_tpdm_prng>;
				};
			};
		};
	};

	tpdm_qm: tpdm@109d0000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x109d0000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-qm";
		atid = <78>;
		clocks = <&aoss_qmp>;
		status = "disabled";
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_qm_out_tpda_dl_center: endpoint {
					remote-endpoint =
					<&tpda_dl_center_in_tpdm_qm>;
				};
			};
		};
	};

	tpdm_gcc: tpdm@1082c000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x1082c000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-gcc";
		atid = <78>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_gcc_out_tpda_dl_center: endpoint {
					remote-endpoint =
					<&tpda_dl_center_in_tpdm_gcc>;
				};
			};
		};
	};

	tpdm_vsense: tpdm@10840000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10840000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-vsense";

		atid = <78>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
		status = "disabled";

		out-ports {
			port {
				tpdm_vsense_out_tpda_dl_center: endpoint {
					remote-endpoint =
					<&tpda_dl_center_in_tpdm_vsense>;
				};
			};
		};
	};

	tpdm_pimem: tpdm@10850000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10850000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-pimem";

		atid = <78>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_pimem_out_tpda_dl_center: endpoint {
					remote-endpoint =
					<&tpda_dl_center_in_tpdm_pimem>;
				};
			};
		};
	};

	tpdm_dl_center: tpdm@10c28000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10c28000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-dl_center";

		atid = <78>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_dl_center_out_tpda_dl_center: endpoint {
					remote-endpoint =
					<&tpda_dl_center_in_tpdm_dl_center>;
				};
			};
		};
	};

	tpdm_ipcc: tpdm@10c29000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10c29000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-ipcc";
		atid = <78>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_ipcc_out_tpda_dl_center: endpoint {
					remote-endpoint =
					<&tpda_dl_center_in_tpdm_ipcc>;
				};
			};
		};
	};

	tpdm_swao: tpdm@10b0d000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10b0d000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-swao";
		atid = <71>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_swao_out_tpda_aoss: endpoint {
					remote-endpoint =
					<&tpda_aoss_in_tpdm_swao>;
				};
			};
		};
	};

	tpdm_spdm: tpdm@1000f000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x1000f000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-spdm";
		atid = <65>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_spdm_out_tpda_qdss: endpoint {
					remote-endpoint =
					<&tpda_qdss_in_tpdm_spdm>;
				};
			};
		};
	};

	tpdm_dcc: tpdm@10003000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10003000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-dcc";
		atid = <65>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
		qcom,hw-enable-check;

		out-ports {
			port {
				tpdm_dcc_out_tpda_qdss: endpoint {
					remote-endpoint =
					<&tpda_qdss_in_tpdm_dcc>;
				};
			};
		};
	};

	tpdm_dl_south: tpdm@109c0000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x109c0000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-dl_south";
		atid = <75>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_dl_south_out_tpda_dl_south: endpoint {
					remote-endpoint =
					<&tpda_dl_south_in_tpdm_dl_south>;
				};
			};
		};
	};

	tpdm_apss0: tpdm@12860000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x12860000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-apss0";
		atid = <66>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_apss0_out_tpda_apss: endpoint {
					remote-endpoint =
					<&tpda_apss_in_tpdm_apss0>;
				};
			};
		};
	};

	tpdm_apss1: tpdm@12861000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x12861000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-apss1";
		atid = <66>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_apss1_out_tpda_apss: endpoint {
					remote-endpoint =
					<&tpda_apss_in_tpdm_apss1>;
				};
			};
		};
	};

	tpdm_modem0: tpdm@10880000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10880000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-modem0";
		atid = <67>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_modem0_out_tpda_modem: endpoint {
					remote-endpoint =
					<&tpda_modem_in_tpdm_modem0>;
				};
			};
		};
	};

	tpdm_modem1: tpdm@10881000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10881000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-modem1";
		atid = <67>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		status = "disabled";
		out-ports {
			port {
				tpdm_modem1_out_tpda_modem: endpoint {
					remote-endpoint =
					<&tpda_modem_in_tpdm_modem1>;
				};
			};
		};
	};

	tpdm_sdcc5: tpdm@10c20000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10c20000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-sdcc5";
		atid = <75>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
		status = "disabled";

		out-ports {
			port {
				tpdm_sdcc5_out_tpda_dl_south: endpoint {
					remote-endpoint =
					<&tpda_dl_south_in_tpdm_sdcc5>;
				};
			};
		};
	};

	tpdm_tmess_prng: tpdm@10cc9000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10cc9000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-tmess_prng";
		atid = <85>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
		qcom,hw-enable-check;

		out-ports {
			port {
				tpdm_tmess_prng_out_tpda_tmess: endpoint {
					remote-endpoint =
					<&tpda_tmess_in_tpdm_tmess_prng>;
				};
			};
		};
	};

	tpdm_tmess0: tpdm@10cc0000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10cc0000 0x1000>;
		reg-names = "tpdm-base";
		atid = <85>;
		coresight-name = "coresight-tpdm-tmess0";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
		qcom,hw-enable-check;

		out-ports {
			port {
				tpdm_tmess0_out_tpda_tmess: endpoint {
					remote-endpoint =
					<&tpda_tmess_in_tpdm_tmess0>;
				};
			};
		};
	};

	tpdm_tmess1: tpdm@10cc1000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10cc1000 0x1000>;
		reg-names = "tpdm-base";
		atid = <85>;
		coresight-name = "coresight-tpdm-tmess1";

		qcom,hw-enable-check;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_tmess1_out_tpda_tmess: endpoint {
					remote-endpoint =
					<&tpda_tmess_in_tpdm_tmess1>;
				};
			};
		};
	};

	tpdm_ecpri: tpdm@10940000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10940000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-ecpri";
		atid = <82>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_ecpri_out_tpda_dl_east: endpoint {
					remote-endpoint =
					<&tpda_dl_east_in_tpdm_ecpri>;
				};
			};
		};
	};

	tpdm_eth: tpdm@10b80000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10b80000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-eth";
		atid = <82>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_eth_out_tpda_dl_east: endpoint {
					remote-endpoint =
					<&tpda_dl_east_in_tpdm_eth>;
				};
			};
		};
	};

	tpdm_ecpri_cc: tpdm@10854000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10854000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-ecpri_cc";
		atid = <82>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_ecpri_cc_out_tpda_dl_east: endpoint {
					remote-endpoint =
					<&tpda_dl_east_in_tpdm_ecpri_cc>;
				};
			};
		};
	};

	tpdm_dlet0: tpdm@10c30000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10c30000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-dlet0";
		atid = <82>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_dlet0_out_tpda_dl_east: endpoint {
					remote-endpoint =
					<&tpda_dl_east_in_tpdm_dlet0>;
				};
			};
		};
	};

	tpdm_dlet1: tpdm@10c31000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb968>;
		reg = <0x10c31000 0x1000>;
		reg-names = "tpdm-base";

		coresight-name = "coresight-tpdm-dlet1";
		atid = <82>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				tpdm_dlet1_out_tpda_dl_east: endpoint {
					remote-endpoint =
					<&tpda_dl_east_in_tpdm_dlet1>;
				};
			};
		};
	};

	funnel_ddr_ch_01: funnel@10d12000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10d12000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-ddr_ch_01";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			port {
				funnel_ddr_ch_01_in_tpdm_ddr_ch01: endpoint {
					remote-endpoint =
					<&tpdm_ddr_ch01_out_funnel_ddr_ch_01>;
				};
			};

		};

		out-ports {

			port {
				funnel_ddr_ch_01_out_tpda_ddr: endpoint {
					remote-endpoint =
					<&tpda_ddr_in_funnel_ddr_ch_01>;
				};
			};

		};
	};

	funnel_ddr_ch_23: funnel@10d22000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10d22000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-ddr_ch_23";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			port {
				funnel_ddr_ch_23_in_tpdm_ddr_ch23: endpoint {
					remote-endpoint =
					<&tpdm_ddr_ch23_out_funnel_ddr_ch_23>;
				};
			};

		};

		out-ports {

			port {
				funnel_ddr_ch_23_out_tpda_ddr: endpoint {
					remote-endpoint =
					<&tpda_ddr_in_funnel_ddr_ch_23>;
				};
			};

		};
	};

	funnel_ddr_ch_45: funnel@10d42000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10d42000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-ddr_ch_45";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			port {
				funnel_ddr_ch_45_in_tpdm_ddr_ch45: endpoint {
					remote-endpoint =
					<&tpdm_ddr_ch45_out_funnel_ddr_ch_45>;
				};
			};

		};

		out-ports {

			port {
				funnel_ddr_ch_45_out_tpda_ddr: endpoint {
					remote-endpoint =
					<&tpda_ddr_in_funnel_ddr_ch_45>;
				};
			};

		};
	};

	funnel_ddr_ch_67: funnel@10d52000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10d52000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-ddr_ch_67";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			port {
				funnel_ddr_ch_67_in_tpdm_ddr_ch67: endpoint {
					remote-endpoint =
					<&tpdm_ddr_ch67_out_funnel_ddr_ch_67>;
				};
			};

		};

		out-ports {

			port {
				funnel_ddr_ch_67_out_tpda_ddr: endpoint {
					remote-endpoint =
					<&tpda_ddr_in_funnel_ddr_ch_67>;
				};
			};

		};
	};

	tpda_ddr: tpda@10d03000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x10d03000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda-ddr";

		qcom,tpda-atid = <80>;
		qcom,dsb-elem-size = <0 32>,
				     <1 32>,
				     <2 32>,
				     <3 32>,
				     <4 32>;

		qcom,cmb-elem-size = <5 64>;

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				tpda_ddr_in_funnel_ddr_ch_23: endpoint {
					remote-endpoint =
					<&funnel_ddr_ch_23_out_tpda_ddr>;
				};
			};

			port@0 {
				reg = <0>;
				tpda_ddr_in_funnel_ddr_ch_01: endpoint {
					remote-endpoint =
					<&funnel_ddr_ch_01_out_tpda_ddr>;
				};
			};

			port@3 {
				reg = <3>;
				tpda_ddr_in_funnel_ddr_ch_67: endpoint {
					remote-endpoint =
					<&funnel_ddr_ch_67_out_tpda_ddr>;
				};
			};

			port@2 {
				reg = <2>;
				tpda_ddr_in_funnel_ddr_ch_45: endpoint {
					remote-endpoint =
					<&funnel_ddr_ch_45_out_tpda_ddr>;
				};
			};

			port@5 {
				reg = <5>;
				tpda_ddr_in_tpdm_ddr1: endpoint {
					remote-endpoint =
					<&tpdm_ddr1_out_tpda_ddr>;
				};
			};

			port@4 {
				reg = <4>;
				tpda_ddr_in_tpdm_ddr0: endpoint {
					remote-endpoint =
					<&tpdm_ddr0_out_tpda_ddr>;
				};
			};

		};

		out-ports {

			port {
				tpda_ddr_out_funnel_ddr_dl_0: endpoint {
					remote-endpoint =
					<&funnel_ddr_dl_0_in_tpda_ddr>;
				};
			};

		};
	};

	gladiator: gladiator {
		compatible = "qcom,coresight-dummy";
		coresight-name = "coresight-gladiator";
		qcom,dummy-source;

		atid = <96>;

		out-ports {
			port {
				gladiator_out_funnel_ddr_dl1: endpoint {
					remote-endpoint =
					<&funnel_ddr_dl1_in_gladiator>;
				};
			};
		};
	};

	funnel_ddr_dl1: funnel@10d0f000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10d0f000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-ddr_dl1";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@6 {
				reg = <6>;
				funnel_ddr_dl1_in_gladiator: endpoint {
					remote-endpoint =
					<&gladiator_out_funnel_ddr_dl1>;
				};
			};
		};

		out-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_ddr_dl1_out_funnel_ddr_dl0: endpoint {
					remote-endpoint =
					<&funnel_ddr_dl0_in_funnel_ddr_dl1>;
				};
			};
		};

	};

	funnel_ddr_dl_0: funnel@10d04000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10d04000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-ddr_dl_0";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_ddr_dl_0_in_tpda_ddr: endpoint {
					remote-endpoint =
					<&tpda_ddr_out_funnel_ddr_dl_0>;
				};
			};

			port@5 {
				reg = <5>;
				funnel_ddr_dl0_in_funnel_ddr_dl1: endpoint {
					remote-endpoint =
					<&funnel_ddr_dl1_out_funnel_ddr_dl0>;
				};
			};
		};

		out-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_ddr_dl_0_out_funnel_dl_center: endpoint {
					remote-endpoint =
					<&funnel_dl_center_in_funnel_ddr_dl_0>;
				};
			};

		};
	};

	tpda_dl_south: tpda@109c1000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x109c1000 0x1000>;
		reg-names = "tpda-base";

		qcom,tpda-atid = <75>;
		qcom,cmb-elem-size = <1 32>;
		qcom,dsb-elem-size = <2 32>;

		coresight-name = "coresight-tpda-dl_south";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				tpda_dl_south_in_tpdm_sdcc5: endpoint {
					remote-endpoint =
					<&tpdm_sdcc5_out_tpda_dl_south>;
				};
			};

			port@2 {
				reg = <2>;
				tpda_dl_south_in_tpdm_dl_south: endpoint {
					remote-endpoint =
					<&tpdm_dl_south_out_tpda_dl_south>;
				};
			};

		};

		out-ports {

			port {
				tpda_dl_south_out_funnel_dl_south: endpoint {
					remote-endpoint =
					<&funnel_dl_south_in_tpda_dl_south>;
				};
			};

		};
	};

	funnel_dl_south: funnel@109c2000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x109c2000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-dl_south";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			port {
				funnel_dl_south_in_tpda_dl_south: endpoint {
					remote-endpoint =
					<&tpda_dl_south_out_funnel_dl_south>;
				};
			};

		};

		out-ports {

			port {
				funnel_dl_south_out_funnel_in1: endpoint {
					remote-endpoint =
					<&funnel_in1_in_funnel_dl_south>;
				};
			};

		};
	};

	tpda_tmess: tpda@10cc4000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x10cc4000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda-tmess";
		qcom,tpda-atid = <85>;
		qcom,cmb-elem-size = <0 32>,
				     <1 32>,
				     <2 32>;

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				tpda_tmess_in_tpdm_tmess0: endpoint {
					remote-endpoint =
					<&tpdm_tmess0_out_tpda_tmess>;
				};
			};

			port@0 {
				reg = <0>;
				tpda_tmess_in_tpdm_tmess_prng: endpoint {
					remote-endpoint =
					<&tpdm_tmess_prng_out_tpda_tmess>;
				};
			};

			port@2 {
				reg = <2>;
				tpda_tmess_in_tpdm_tmess1: endpoint {
					remote-endpoint =
					<&tpdm_tmess1_out_tpda_tmess>;
				};
			};

		};

		out-ports {

			port {
				tpda_tmess_out_funnel_tmess: endpoint {
					remote-endpoint =
					<&funnel_tmess_in_tpda_tmess>;
				};
			};

		};
	};

	funnel_tmess: funnel@10cc5000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10cc5000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-tmess";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_tmess_in_tpda_tmess: endpoint {
					remote-endpoint =
					<&tpda_tmess_out_funnel_tmess>;
				};
			};

		};

		out-ports {

			port {
				funnel_tmess_out_funnel_in1: endpoint {
					remote-endpoint =
					<&funnel_in1_in_funnel_tmess>;
				};
			};

		};
	};

	tpda_modem: tpda@10883000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x10883000 0x1000>;
		reg-names = "tpda-base";

		qcom,tpda-atid = <67>;

		qcom,dsb-elem-size = <0 32>;
		qcom,cmb-elem-size = <0 64>,
				     <1 64>;

		coresight-name = "coresight-tpda-modem";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				tpda_modem_in_tpdm_modem1: endpoint {
					remote-endpoint =
					<&tpdm_modem1_out_tpda_modem>;
				};
			};

			port@0 {
				reg = <0>;
				tpda_modem_in_tpdm_modem0: endpoint {
					remote-endpoint =
					<&tpdm_modem0_out_tpda_modem>;
				};
			};

		};

		out-ports {

			port {
				tpda_modem_out_funnel_modem: endpoint {
					remote-endpoint =
					<&funnel_modem_in_tpda_modem>;
				};
			};

		};
	};

	modem_etm0 {
		compatible = "qcom,coresight-remote-etm";

		coresight-name = "coresight-modem-etm0";
		qcom,inst-id = <2>;

		atid = <36 37>;
		out-ports {
			port {
				modem_etm0_out_funnel_modem_q6_dup: endpoint {
					remote-endpoint =
						<&funnel_modem_q6_dup_in_modem_etm0>;
				};
			};
		};
	};

	modem2_etm0 {
		compatible = "qcom,coresight-remote-etm";

		coresight-name = "coresight-modem2-etm0";
		qcom,inst-id = <11>;

		atid = <39>;
		out-ports {
			port {
				modem2_etm0_out_funnel_modem: endpoint {
					remote-endpoint =
						<&funnel_modem_in_modem2_etm0>;
				};
			};
		};
	};

	modem_diag: modem_diag {
		compatible = "qcom,coresight-dummy";
		coresight-name = "coresight-modem-diag";
		qcom,dummy-source;

		atid = <50>;
		out-ports {
			port {
				modem_diag_out_funnel_modem_q6: endpoint {
					remote-endpoint =
					<&funnel_modem_q6_in_modem_diag>;
				};
			};
		};
	};

	funnel_modem_q6_dup: funnel@1088d000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x1088d000 0x1000>,
			<0x1088c000 0x1000>;
		reg-names = "funnel-base-dummy", "funnel-base-real";

		coresight-name = "coresight-funnel-modem_q6_dup";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
		qcom,duplicate-funnel;

		in-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_modem_q6_dup_in_modem_etm0: endpoint {
					remote-endpoint =
					<&modem_etm0_out_funnel_modem_q6_dup>;
				};
			};

		};

		out-ports {
			port {
				funnel_modem_q6_dup_out_funnel_modem_q6: endpoint {
					remote-endpoint =
					<&funnel_modem_q6_in_funnel_modem_q6_dup>;
				};
			};

		};
	};

	funnel_modem_q6: funnel@1088c000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x1088c000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-modem_q6";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				funnel_modem_q6_in_funnel_modem_q6_dup: endpoint {
					remote-endpoint =
					<&funnel_modem_q6_dup_out_funnel_modem_q6>;
				};
			};

			port@2 {
				reg = <2>;
				funnel_modem_q6_in_modem_diag: endpoint {
					remote-endpoint =
					<&modem_diag_out_funnel_modem_q6>;
				};
			};

		};

		out-ports {
			port {
				funnel_modem_q6_out_funnel_modem: endpoint {
					remote-endpoint =
					<&funnel_modem_in_funnel_modem_q6>;
				};
			};

		};
	};

	funnel_modem: funnel@10884000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10884000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-modem";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				funnel_modem_in_modem2_etm0: endpoint {
					remote-endpoint =
					<&modem2_etm0_out_funnel_modem>;
				};
			};

			port@0 {
				reg = <0>;
				funnel_modem_in_tpda_modem: endpoint {
					remote-endpoint =
					<&tpda_modem_out_funnel_modem>;
				};
			};

			port@4 {
				reg = <4>;
				funnel_modem_in_funnel_modem_q6: endpoint {
					remote-endpoint =
					<&funnel_modem_q6_out_funnel_modem>;
				};
			};

		};

		out-ports {
			port {
				funnel_modem_out_funnel_in1: endpoint {
					remote-endpoint =
					<&funnel_in1_in_funnel_modem>;
				};
			};

		};
	};

	tpda_apss: tpda@12863000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x12863000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda-apss";
		qcom,tpda-atid = <66>;
		qcom,dsb-elem-size = <4 32>;
		qcom,cmb-elem-size = <3 64>;

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@3 {
				reg = <3>;
				tpda_apss_in_tpdm_apss0: endpoint {
					remote-endpoint =
					<&tpdm_apss0_out_tpda_apss>;
				};
			};

			port@4 {
				reg = <4>;
				tpda_apss_in_tpdm_apss1: endpoint {
					remote-endpoint =
					<&tpdm_apss1_out_tpda_apss>;
				};
			};

		};

		out-ports {

			port {
				tpda_apss_out_funnel_apss: endpoint {
					remote-endpoint =
					<&funnel_apss_in_tpda_apss>;
				};
			};

		};
	};

	etm0: etm@12040000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bbd05>;

		reg = <0x12040000 0x1000>;
		cpu = <&CPU0>;

		atid = <1>;
		coresight-name = "coresight-etm0";

		qcom,skip-power-up;
		arm,coresight-loses-context-with-cpu;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				etm0_out_funnel_apss: endpoint {
					remote-endpoint =
					<&funnel_apss_in_etm0>;
				};
			};
		};
	};

	etm1: etm@12140000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bbd05>;

		reg = <0x12140000 0x1000>;
		cpu = <&CPU1>;
		atid = <2>;
		coresight-name = "coresight-etm1";

		qcom,skip-power-up;
		arm,coresight-loses-context-with-cpu;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				etm1_out_funnel_apss: endpoint {
					remote-endpoint =
					<&funnel_apss_in_etm1>;
				};
			};
		};
	};

	etm2: etm@12240000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bbd05>;

		reg = <0x12240000 0x1000>;
		cpu = <&CPU2>;

		coresight-name = "coresight-etm2";

		atid = <3>;
		qcom,skip-power-up;
		arm,coresight-loses-context-with-cpu;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				etm2_out_funnel_apss: endpoint {
					remote-endpoint =
					<&funnel_apss_in_etm2>;
				};
			};
		};
	};

	etm3: etm@12340000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bbd05>;

		reg = <0x12340000 0x1000>;
		cpu = <&CPU3>;

		coresight-name = "coresight-etm3";

		qcom,skip-power-up;
		arm,coresight-loses-context-with-cpu;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				etm3_out_funnel_apss: endpoint {
					remote-endpoint =
					<&funnel_apss_in_etm3>;
				};
			};
		};
	};

	funnel_apss: funnel@12810000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x12810000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-apss";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_apss_in_etm0: endpoint {
					remote-endpoint =
					<&etm0_out_funnel_apss>;
				};
			};

			port@1 {
				reg = <1>;
				funnel_apss_in_etm1: endpoint {
					remote-endpoint =
					<&etm1_out_funnel_apss>;
				};
			};

			port@2 {
				reg = <2>;
				funnel_apss_in_etm2: endpoint {
					remote-endpoint =
					<&etm2_out_funnel_apss>;
				};
			};

			port@3 {
				reg = <3>;
				funnel_apss_in_etm3: endpoint {
					remote-endpoint =
					<&etm3_out_funnel_apss>;
				};
			};

			port@6 {
				reg = <6>;
				funnel_apss_in_tpda_apss: endpoint {
					remote-endpoint =
					<&tpda_apss_out_funnel_apss>;
				};
			};

		};

		out-ports {

			port {
				funnel_apss_out_funnel_in1: endpoint {
					remote-endpoint =
					<&funnel_in1_in_funnel_apss>;
				};
			};

		};
	};

	tpda_dl_center: tpda@10c2b000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x10c2b000 0x1000>;
		reg-names = "tpda-base";

		qcom,tpda-atid = <78>;

		qcom,dsb-elem-size = <20 32>,
				     <21 32>,
				     <25 32>,
				     <26 32>;

		qcom,cmb-elem-size = <19 64>,
				     <22 32>,
				     <25 64>,
				     <27 64>;

		coresight-name = "coresight-tpda-dl_center";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@19 {
				reg = <25>;
				tpda_dl_center_in_tpdm_pimem: endpoint {
					remote-endpoint =
					<&tpdm_pimem_out_tpda_dl_center>;
				};
			};

			port@1a {
				reg = <26>;
				tpda_dl_center_in_tpdm_dl_center: endpoint {
					remote-endpoint =
					<&tpdm_dl_center_out_tpda_dl_center>;
				};
			};

			port@1b {
				reg = <27>;
				tpda_dl_center_in_tpdm_ipcc: endpoint {
					remote-endpoint =
					<&tpdm_ipcc_out_tpda_dl_center>;
				};
			};

			port@14 {
				reg = <20>;
				tpda_dl_center_in_tpdm_qm: endpoint {
					remote-endpoint =
					<&tpdm_qm_out_tpda_dl_center>;
				};
			};

			port@15 {
				reg = <21>;
				tpda_dl_center_in_tpdm_gcc: endpoint {
					remote-endpoint =
					<&tpdm_gcc_out_tpda_dl_center>;
				};
			};

			port@16 {
				reg = <22>;
				tpda_dl_center_in_tpdm_vsense: endpoint {
					remote-endpoint =
					<&tpdm_vsense_out_tpda_dl_center>;
				};
			};

			port@13 {
				reg = <19>;
				tpda_dl_center_in_tpdm_prng: endpoint {
					remote-endpoint =
					<&tpdm_prng_out_tpda_dl_center>;
				};
			};

		};

		out-ports {

			port {
				tpda_dl_center_out_funnel_dl_center: endpoint {
					remote-endpoint =
					<&funnel_dl_center_in_tpda_dl_center>;
				};
			};

		};
	};

	funnel_dl_center: funnel@10c2c000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10c2c000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-dl_center";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_dl_center_in_tpda_dl_center: endpoint {
					remote-endpoint =
					<&tpda_dl_center_out_funnel_dl_center>;
				};
			};

			port@4 {
				reg = <4>;
				funnel_dl_center_in_funnel_ddr_dl_0: endpoint {
					remote-endpoint =
					<&funnel_ddr_dl_0_out_funnel_dl_center>;
				};
			};

		};

		out-ports {

			port {
				funnel_dl_center_out_funnel_in1: endpoint {
					remote-endpoint =
					<&funnel_in1_in_funnel_dl_center>;
				};
			};

		};
	};

	tpda_dl_east: tpda@10c34000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x10c34000 0x1000>;
		reg-names = "tpda-base";
		qcom,tpda-atid = <82>;
		qcom,dsb-elem-size = <0 32>,
				     <1 32>,
				     <2 32>,
				     <8 32>;
		qcom,cmb-elem-size = <1 32>,
				     <2 64>,
				     <9 32>;

		coresight-name = "coresight-tpda-dl_east";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				tpda_dl_east_in_tpdm_ecpri: endpoint {
					remote-endpoint =
					<&tpdm_ecpri_out_tpda_dl_east>;
				};
			};

			port@0 {
				reg = <0>;
				tpda_dl_east_in_tpdm_ecpri_cc: endpoint {
					remote-endpoint =
					<&tpdm_ecpri_cc_out_tpda_dl_east>;
				};
			};

			port@2 {
				reg = <2>;
				tpda_dl_east_in_tpdm_eth: endpoint {
					remote-endpoint =
					<&tpdm_eth_out_tpda_dl_east>;
				};
			};

			port@9 {
				reg = <9>;
				tpda_dl_east_in_tpdm_dlet1: endpoint {
					remote-endpoint =
					<&tpdm_dlet1_out_tpda_dl_east>;
				};
			};

			port@8 {
				reg = <8>;
				tpda_dl_east_in_tpdm_dlet0: endpoint {
					remote-endpoint =
					<&tpdm_dlet0_out_tpda_dl_east>;
				};
			};

		};

		out-ports {

			port {
				tpda_dl_east_out_funnel_dl_east: endpoint {
					remote-endpoint =
					<&funnel_dl_east_in_tpda_dl_east>;
				};
			};

		};
	};

	funnel_dl_east: funnel@10c35000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10c35000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-dl_east";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			port {
				funnel_dl_east_in_tpda_dl_east: endpoint {
					remote-endpoint =
					<&tpda_dl_east_out_funnel_dl_east>;
				};
			};

		};

		out-ports {

			port {
				funnel_dl_east_out_funnel_in1: endpoint {
					remote-endpoint =
					<&funnel_in1_in_funnel_dl_east>;
				};
			};

		};
	};

	tpda_qdss: tpda@10004000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x10004000 0x1000>;
		reg-names = "tpda-base";

		qcom,tpda-atid = <65>;
		qcom,cmb-elem-size = <26 32>,
				     <29 32>;
		coresight-name = "coresight-tpda-qdss";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				tpda_qdss_in_tpdm_spdm: endpoint {
					remote-endpoint =
					<&tpdm_spdm_out_tpda_qdss>;
				};
			};

			port@0 {
				reg = <0>;
				tpda_qdss_in_tpdm_dcc: endpoint {
					remote-endpoint =
					<&tpdm_dcc_out_tpda_qdss>;
				};
			};

		};

		out-ports {

			port {
				tpda_qdss_out_funnel_in0: endpoint {
					remote-endpoint =
					<&funnel_in0_in_tpda_qdss>;
				};
			};

		};
	};

	stm: stm@10002000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb962>;
		reg = <0x10002000 0x1000>,
			<0x16280000 0x180000>;
		reg-names = "stm-base", "stm-stimulus-base";

		coresight-name = "coresight-stm";

		atid = <16>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		out-ports {
			port {
				stm_out_funnel_in0: endpoint {
					remote-endpoint =
					<&funnel_in0_in_stm>;
				};
			};
		};
	};

	funnel_in0: funnel@10041000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10041000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-in0";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@6 {
				reg = <6>;
				funnel_in0_in_tpda_qdss: endpoint {
					remote-endpoint =
					<&tpda_qdss_out_funnel_in0>;
				};
			};

			port@7 {
				reg = <7>;
				funnel_in0_in_stm: endpoint {
					remote-endpoint =
					<&stm_out_funnel_in0>;
				};
			};

		};

		out-ports {

			port {
				funnel_in0_out_funnel_merge: endpoint {
					remote-endpoint =
					<&funnel_merge_in_funnel_in0>;
				};
			};

		};
	};

	funnel_in1: funnel@10042000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10042000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-in1";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_in1_in_funnel_dl_south: endpoint {
					remote-endpoint =
					<&funnel_dl_south_out_funnel_in1>;
				};
			};

			port@2 {
				reg = <2>;
				funnel_in1_in_funnel_tmess: endpoint {
					remote-endpoint =
					<&funnel_tmess_out_funnel_in1>;
				};
			};

			port@5 {
				reg = <5>;
				funnel_in1_in_funnel_modem: endpoint {
					remote-endpoint =
					<&funnel_modem_out_funnel_in1>;
				};
			};

			port@4 {
				reg = <4>;
				funnel_in1_in_funnel_apss: endpoint {
					remote-endpoint =
					<&funnel_apss_out_funnel_in1>;
				};
			};

			port@7 {
				reg = <7>;
				funnel_in1_in_funnel_dl_east: endpoint {
					remote-endpoint =
					<&funnel_dl_east_out_funnel_in1>;
				};
			};

			port@6 {
				reg = <6>;
				funnel_in1_in_funnel_dl_center: endpoint {
					remote-endpoint =
					<&funnel_dl_center_out_funnel_in1>;
				};
			};

		};

		out-ports {

			port {
				funnel_in1_out_funnel_merge: endpoint {
					remote-endpoint =
					<&funnel_merge_in_funnel_in1>;
				};
			};

		};
	};

	funnel_merge: funnel@10045000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10045000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-merge";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				funnel_merge_in_funnel_in1: endpoint {
					remote-endpoint =
					<&funnel_in1_out_funnel_merge>;
				};
			};

			port@0 {
				reg = <0>;
				funnel_merge_in_funnel_in0: endpoint {
					remote-endpoint =
					<&funnel_in0_out_funnel_merge>;
				};
			};

		};

		out-ports {

			port {
				funnel_merge_out_funnel_aoss: endpoint {
					remote-endpoint =
					<&funnel_aoss_in_funnel_merge>;
				};
			};

		};
	};

	tpda_aoss: tpda@10b08000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb969>;

		reg = <0x10b08000 0x1000>;
		reg-names = "tpda-base";

		coresight-name = "coresight-tpda-aoss";

		qcom,tpda-atid = <71>;

		qcom,cmb-elem-size = <0 64>,
				 <1 64>,
				 <2 64>,
				 <3 64>;

		qcom,dsb-elem-size = <4 32>;

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@1 {
				reg = <1>;
				tpda_aoss_in_tpdm_swao_prio1: endpoint {
					remote-endpoint =
					<&tpdm_swao_prio1_out_tpda_aoss>;
				};
			};

			port@0 {
				reg = <0>;
				tpda_aoss_in_tpdm_swao_prio0: endpoint {
					remote-endpoint =
					<&tpdm_swao_prio0_out_tpda_aoss>;
				};
			};

			port@3 {
				reg = <3>;
				tpda_aoss_in_tpdm_swao_prio3: endpoint {
					remote-endpoint =
					<&tpdm_swao_prio3_out_tpda_aoss>;
				};
			};

			port@2 {
				reg = <2>;
				tpda_aoss_in_tpdm_swao_prio2: endpoint {
					remote-endpoint =
					<&tpdm_swao_prio2_out_tpda_aoss>;
				};
			};

			port@4 {
				reg = <4>;
				tpda_aoss_in_tpdm_swao: endpoint {
					remote-endpoint =
					<&tpdm_swao_out_tpda_aoss>;
				};
			};

		};

		out-ports {

			port {
				tpda_aoss_out_funnel_aoss: endpoint {
					remote-endpoint =
					<&funnel_aoss_in_tpda_aoss>;
				};
			};

		};
	};

	funnel_aoss: funnel@10b04000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb908>;

		reg = <0x10b04000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-aoss";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {

			#address-cells = <1>;
			#size-cells = <0>;

			port@7 {
				reg = <7>;
				funnel_aoss_in_funnel_merge: endpoint {
					remote-endpoint =
					<&funnel_merge_out_funnel_aoss>;
				};
			};

			port@6 {
				reg = <6>;
				funnel_aoss_in_tpda_aoss: endpoint {
					remote-endpoint =
					<&tpda_aoss_out_funnel_aoss>;
				};
			};

		};

		out-ports {

			port {
				funnel_aoss_out_tmc_etf: endpoint {
					remote-endpoint =
					<&tmc_etf_in_funnel_aoss>;
				};
			};

		};
	};

	tmc_etf: tmc@10b05000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb961>;
		reg = <0x10b05000 0x1000>;
		reg-names = "tmc-base";

		coresight-name = "coresight-tmc-etf";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			port {
				tmc_etf_in_funnel_aoss: endpoint {
					remote-endpoint =
					<&funnel_aoss_out_tmc_etf>;
				};
			};
		};

		out-ports {
			port {
				tmc_etf_out_replicator_swao: endpoint {
					remote-endpoint =
					<&replicator_swao_in_tmc_etf>;
				};
			};
		};
	};

	replicator_swao: replicator@10b06000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb909>;
		reg = <0x10b06000 0x1000>;
		reg-names = "replicator-base";

		coresight-name = "coresight-replicator_swao";

		qcom,replicator-loses-context;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			port {
				replicator_swao_in_tmc_etf: endpoint {
					remote-endpoint =
					<&tmc_etf_out_replicator_swao>;
				};
			};
		};

		out-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				replicator_swao_out_replicator_qdss: endpoint {
					remote-endpoint =
					<&replicator_qdss_in_replicator_swao>;
				};
			};

			port@1 {
				reg = <1>;
				replicator_swao_out_eud: endpoint {
					remote-endpoint =
					  <&eud_in_replicator_swao>;
				};
			};
		};
	};

	dummy_eud: dummy_sink {
		compatible = "qcom,coresight-dummy";

		coresight-name = "coresight-eud";

		qcom,dummy-sink;
		in-ports {
			port {
				eud_in_replicator_swao: endpoint {
					remote-endpoint =
						<&replicator_swao_out_eud>;
				};
			};
		};
	};

	replicator_qdss: replicator@10046000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb909>;
		reg = <0x10046000 0x1000>;
		reg-names = "replicator-base";

		coresight-name = "coresight-replicator_qdss";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			port {
				replicator_qdss_in_replicator_swao: endpoint {
					remote-endpoint =
					<&replicator_swao_out_replicator_qdss>;
				};
			};
		};

		out-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				replicator_qdss_out_replicator_etr: endpoint {
					remote-endpoint =
					<&replicator_etr_in_replicator_qdss>;
				};
			};

			port@1 {
				reg = <1>;
				replicator_qdss_out_replicator_etr2: endpoint {
					remote-endpoint =
					<&replicator_etr2_in_replicator_qdss>;
				};
			};
		};
	};

	replicator_etr: replicator@1004e000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb909>;
		reg = <0x1004e000 0x1000>;
		reg-names = "replicator-base";

		coresight-name = "coresight-replicator_etr";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			port {
				replicator_etr_in_replicator_qdss: endpoint {
					remote-endpoint =
					<&replicator_qdss_out_replicator_etr>;
				};
			};
		};

		out-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				replicator_etr_out_tmc_etr: endpoint {
					remote-endpoint =
					<&tmc_etr_in_replicator_etr>;
				};
			};

			port@1 {
				reg = <1>;
				replicator_etr_out_tmc_etr1: endpoint {
					remote-endpoint =
					<&tmc_etr1_in_replicator_etr>;
				};
			};
		};
	};

	replicator_etr2: replicator@1004a000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb909>;
		reg = <0x1004a000 0x1000>;
		reg-names = "replicator-base";

		coresight-name = "coresight-replicator_etr2";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			port {
				replicator_etr2_in_replicator_qdss: endpoint {
					remote-endpoint =
					<&replicator_qdss_out_replicator_etr2>;
				};
			};
		};

		out-ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				replicator_etr2_out_tmc_etr2: endpoint {
					remote-endpoint =
					<&tmc_etr2_in_replicator_etr2>;
				};
			};
		};
	};

	tmc_etr: tmc@10048000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb961>;
		reg = <0x10048000 0x1000>,
			<0x10064000 0x16000>;
		reg-names = "tmc-base", "bam-base";

		qcom,mem_support;
		qcom,sw-usb;
		dma-coherent;
		coresight-name = "coresight-tmc-etr";

		coresight-csr = <&csr>;
		csr-atid-offset = <0xf8>;
		csr-irqctrl-offset = <0x6c>;
		byte-cntr-name = "byte-cntr";
		byte-cntr-class-name = "coresight-tmc-etr-stream";

		interrupts = <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "byte-cntr-irq";

		arm,scatter-gather;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			port {
				tmc_etr_in_replicator_etr: endpoint {
					remote-endpoint =
					<&replicator_etr_out_tmc_etr>;
				};
			};
		};
	};

	tmc_etr1: tmc@1004f000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb961>;
		reg = <0x1004f000 0x1000>;
		reg-names = "tmc-base";

		coresight-name = "coresight-tmc-etr1";

		qcom,mem_support;
		dma-coherent;
		coresight-csr = <&csr>;
		csr-atid-offset = <0x108>;
		csr-irqctrl-offset = <0x70>;
		byte-cntr-name = "byte-cntr1";
		byte-cntr-class-name = "coresight-tmc-etr1-stream";

		interrupts = <GIC_SPI 269 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "byte-cntr-irq";

		arm,scatter-gather;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			port {
				tmc_etr1_in_replicator_etr: endpoint {
					remote-endpoint =
					<&replicator_etr_out_tmc_etr1>;
				};
			};
		};
	};

	tmc_etr2: tmc@1004b000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb961>;
		reg = <0x1004b000 0x1000>;
		reg-names = "tmc-base";

		coresight-name = "coresight-tmc-etr2";

		dma-coherent;
		coresight-csr = <&csr>;
		csr-atid-offset = <0x140>;
		csr-irqctrl-offset = <0x12c>;
		byte-cntr-name = "byte-cntr2";
		byte-cntr-class-name = "coresight-tmc-etr2-stream";

		interrupts = <GIC_SPI 268 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "byte-cntr-irq";

		qcom,eth_support;
		arm,scatter-gather;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		in-ports {
			port {
				tmc_etr2_in_replicator_etr2: endpoint {
					remote-endpoint =
					<&replicator_etr2_out_tmc_etr2>;
				};
			};
		};
	};

	csr: csr@10001000 {
		compatible = "qcom,coresight-csr";
		reg = <0x10001000 0x1000>;
		reg-names = "csr-base";

		coresight-name = "coresight-csr";
		qcom,usb-bam-support;
		qcom,hwctrl-set-support;
		qcom,set-byte-cntr-support;

		qcom,blk-size = <1>;
	};

	swao_csr: csr@10b11000 {
		compatible = "qcom,coresight-csr";
		reg = <0x10b11000 0x1000>,
		  <0x10b110f8 0x50>;
		reg-names = "csr-base", "msr-base";

		coresight-name = "coresight-swao-csr";
		qcom,timestamp-support;
		qcom,msr-support;

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";

		qcom,blk-size = <1>;
	};

	ipcb_tgu: tgu@10b0e000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb999>;
		reg = <0x10b0e000 0x1000>;
		reg-names = "tgu-base";
		tgu-steps = <3>;
		tgu-conditions = <4>;
		tgu-regs = <4>;
		tgu-timer-counters = <8>;

		coresight-name = "coresight-tgu-ipcb";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	spmi_tgu0: tgu@10b0f000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb999>;

		reg = <0x10b0f000 0x1000>;
		reg-names = "tgu-base";

		tgu-steps = <3>;
		tgu-conditions = <4>;
		tgu-regs = <9>;
		tgu-timer-counters = <8>;

		coresight-name = "coresight-tgu-spmi0";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	spmi_tgu1: tgu@10b10000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x000bb999>;

		reg = <0x10b10000 0x1000>;
		reg-names = "tgu-base";

		tgu-steps = <3>;
		tgu-conditions = <4>;
		tgu-regs = <9>;
		tgu-timer-counters = <8>;

		coresight-name = "coresight-tgu-spmi1";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	cti0: cti@10c2a000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10c2a000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-cti0";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	ddr_dl_0_cti_0: cti@10d02000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10d02000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-ddr_dl_0_cti_0";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	ddr_dl_1_cti_0: cti@10d0c000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10d0c000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-ddr_dl_1_cti_0";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	ddr_dl_2_cti_0: cti@10d34000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10d34000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-ddr_dl_2_cti_0";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	ddr_ch01_dl_cti_0: cti@10d11000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10d11000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-ddr_ch01_dl_cti_0";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	ddr_ch23_dl_cti_0: cti@10d21000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10d21000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-ddr_ch23_dl_cti_0";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	ddr_ch45_dl_cti_0: cti@10d41000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10d41000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-ddr_ch45_dl_cti_0";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	ddr_ch67_dl_cti_0: cti@10d51000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10d51000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-ddr_ch67_dl_cti_0";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	swao_cti: cti@10b00000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10b00000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-swao_cti";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	cortex_m3: cti@10b13000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10b13000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-cortex_m3";

		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	apss_cti0: cti@128e0000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x128e0000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-apss_cti0";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	apss_cti1: cti@128f0000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x128f0000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-apss_cti1";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	apss_cti2: cti@12900000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x12900000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-apss_cti2";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	riscv_cti: cti@1282b000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x1282b000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-riscv_cti";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	tmess_cti_0: cti@10cc2000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10cc2000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-tmess_cti_0";
		qcom,extended_cti;
		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	tmess_cti_1: cti@10cc2000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10cc2000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-tmess_cti_1";
		qcom,extended_cti;
		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	tmess_cti_2: cti@10cc2000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10cc2000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-tmess_cti_2";
		qcom,extended_cti;
		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	tmess_cti_3: cti@10cc2000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10cc2000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-tmess_cti_3";
		qcom,extended_cti;
		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	tmess_cti_4: cti@10cc2000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10cc2000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-tmess_cti_4";
		qcom,extended_cti;
		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	tmess_cpu: cti@10cd1000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10cd1000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-tmess_cpu";

		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	mss_cerb_fec_cti: cti@108a0000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x108a0000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-mss_cerb_fec_cti";

		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	mss_cerb_phy0_cti: cti@108c0000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x108c0000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-mss_cerb_phy0_cti";

		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	mss_cerb_phy1_cti: cti@108e0000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x108e0000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-mss_cerb_phy1_cti";

		status = "disabled";
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	mss_q6_cti: cti@1088b000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x1088b000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-mss_q6_cti";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	qc_cti: cti@10010000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x10010000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-qc_cti";
		qcom,extended_cti;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	cpu0: cti@12020000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x12020000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-cpu0";

		cpu = <&CPU0>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	cpu1: cti@12120000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x12120000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-cpu1";

		cpu = <&CPU1>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	cpu2: cti@12220000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x12220000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-cpu2";

		cpu = <&CPU2>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	cpu3: cti@12320000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x12320000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-cpu3";

		cpu = <&CPU3>;
		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};

	cpu_cluster: cti@120e0000 {
		compatible = "arm,coresight-cti", "arm,primecell";
		reg = <0x120e0000 0x1000>;

		arm,primecell-periphid = <0x000bb922>;
		coresight-name = "coresight-cti-cpu_cluster";

		clocks = <&aoss_qmp>;
		clock-names = "apb_pclk";
	};
};
