From 0b504e5ee7e074b513e40ff457e037f533c26046 Mon Sep 17 00:00:00 2001 From: Melody Olvera Date: Mon, 9 Aug 2021 13:59:41 -0700 Subject: [PATCH] ARM: dts: msm: Add initial device tree for cinder Add initial device tree for cinder SoC and RUMI and IDP platforms. Change-Id: I30e129125289e5d4a28f692d876922448549c0a3 --- qcom/Makefile | 12 +++ qcom/cinder-idp-overlay.dts | 11 ++ qcom/cinder-idp.dts | 10 ++ qcom/cinder-idp.dtsi | 5 + qcom/cinder-rumi-overlay.dts | 12 +++ qcom/cinder-rumi.dts | 11 ++ qcom/cinder-rumi.dtsi | 15 +++ qcom/cinder.dts | 9 ++ qcom/cinder.dtsi | 196 +++++++++++++++++++++++++++++++++++ 9 files changed, 281 insertions(+) create mode 100644 qcom/cinder-idp-overlay.dts create mode 100644 qcom/cinder-idp.dts create mode 100644 qcom/cinder-idp.dtsi create mode 100644 qcom/cinder-rumi-overlay.dts create mode 100644 qcom/cinder-rumi.dts create mode 100644 qcom/cinder-rumi.dtsi create mode 100644 qcom/cinder.dts create mode 100644 qcom/cinder.dtsi diff --git a/qcom/Makefile b/qcom/Makefile index 17d0fefd..915e9278 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -41,6 +41,18 @@ dtb-$(CONFIG_ARCH_KALAMA) += kalama-rumi.dtb \ kalama-cdp.dtb \ kalama-qrd.dtb +ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) +CINDER_BASE_DTB += cinder.dtb +CINDER_BOARDS += cinder-rumi-overlay.dtbo \ + cinder-idp-overlay.dtbo + +dtb-$(CONFIG_ARCH_CINDER) += \ + $(call add-overlays, $(CINDER_BOARDS), $(CINDER_BASE_DTB)) +else +dtb-$(CONFIG_ARCH_CINDER) += cinder-rumi.dtb \ + cinder-idp.dtb +endif + always-y := $(dtb-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/qcom/cinder-idp-overlay.dts b/qcom/cinder-idp-overlay.dts new file mode 100644 index 00000000..b92ef568 --- /dev/null +++ b/qcom/cinder-idp-overlay.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/plugin/; + +#include "cinder-idp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Cinder IDP"; + compatible = "qcom,cinder-idp", "qcom,cinder", "qcom,idp"; + qcom,msm-id = <539 0x10000>; + qcom,board-id = <0x1 0x0>; +}; diff --git a/qcom/cinder-idp.dts b/qcom/cinder-idp.dts new file mode 100644 index 00000000..9357a9d4 --- /dev/null +++ b/qcom/cinder-idp.dts @@ -0,0 +1,10 @@ +/dts-v1/; + +#include "cinder.dtsi" +#include "cinder-idp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Cinder IDP"; + compatible = "qcom,cinder-idp", "qcom,cinder", "qcom,idp"; + qcom,board-id = <0x1 0x0>; +}; diff --git a/qcom/cinder-idp.dtsi b/qcom/cinder-idp.dtsi new file mode 100644 index 00000000..cc3a833f --- /dev/null +++ b/qcom/cinder-idp.dtsi @@ -0,0 +1,5 @@ + +&soc { + +}; + diff --git a/qcom/cinder-rumi-overlay.dts b/qcom/cinder-rumi-overlay.dts new file mode 100644 index 00000000..e95af515 --- /dev/null +++ b/qcom/cinder-rumi-overlay.dts @@ -0,0 +1,12 @@ +/dts-v1/; +/plugin/; + +#include "cinder.dtsi" +#include "cinder-rumi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Cinder RUMI"; + compatible = "qcom,cinder-rumi", "qcom,cinder", "qcom,rumi"; + qcom,msm-id = <539 0x10000>; + qcom,board-id = <0xF 0x0>; +}; diff --git a/qcom/cinder-rumi.dts b/qcom/cinder-rumi.dts new file mode 100644 index 00000000..35e38f56 --- /dev/null +++ b/qcom/cinder-rumi.dts @@ -0,0 +1,11 @@ +/dts-v1/; +/memreserve/ 0x90000000 0x00010000; + +#include "cinder.dtsi" +#include "cinder-rumi.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Cinder RUMI"; + compatible = "qcom,cinder-rumi", "qcom,cinder", "qcom,rumi"; + qcom,board-id = <0xF 0x0>; +}; diff --git a/qcom/cinder-rumi.dtsi b/qcom/cinder-rumi.dtsi new file mode 100644 index 00000000..2865ab86 --- /dev/null +++ b/qcom/cinder-rumi.dtsi @@ -0,0 +1,15 @@ +&chosen { + bootargs = "nokaslr kpti=0 log_buf_len=256K swiotlb=0 loop.max_part=7"; +}; + +&arch_timer { + clock-frequency = <500000>; +}; + +&memtimer { + clock-frequency = <500000>; +}; + +&soc { + +}; diff --git a/qcom/cinder.dts b/qcom/cinder.dts new file mode 100644 index 00000000..0612e5b3 --- /dev/null +++ b/qcom/cinder.dts @@ -0,0 +1,9 @@ +/dts-v1/; + +#include "cinder.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Cinder SoC"; + compatible = "qcom,cinder"; + qcom,board-id = <0x0 0x0>; +}; diff --git a/qcom/cinder.dtsi b/qcom/cinder.dtsi new file mode 100644 index 00000000..843fe8d1 --- /dev/null +++ b/qcom/cinder.dtsi @@ -0,0 +1,196 @@ +#include + +/ { + model = "Qualcomm Technologies, Inc. Cinder"; + compatible = "qcom,cinder"; + qcom,msm-id = <539 0x10000>; + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + memory { device_type = "memory"; reg = <0 0 0 0>; }; + + + chosen: chosen { }; + + aliases { }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + + L3_0: l3-cache { + compatible = "arm,arch-cache"; + cache-level = <3>; + }; + }; + }; + + CPU1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x100>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + }; + + CPU2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x200>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_2>; + L2_2: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + }; + + CPU3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x300>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_3>; + L2_3: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + }; + }; + + soc: soc { }; +}; + +&soc { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + reg = <0x17a00000 0x10000>, /* GICD */ + <0x17a60000 0x80000>; /* GICR * 4 */ + interrupts = ; + }; + + arch_timer: timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + , + ; + clock-frequency = <19200000>; + }; + + memtimer: timer@17c20000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0x17c20000 0x1000>; + clock-frequency = <19200000>; + + frame@17c21000 { + frame-number = <0>; + interrupts = , + ; + reg = <0x17c21000 0x1000>, + <0x17c22000 0x1000>; + }; + + frame@17c23000 { + frame-number = <1>; + interrupts = ; + reg = <0x17c23000 0x1000>; + status = "disabled"; + }; + + frame@17c25000 { + frame-number = <2>; + interrupts = ; + reg = <0x17c25000 0x1000>, + <0x17c26000 0x1000>; + status = "disabled"; + }; + + frame@17c27000 { + frame-number = <3>; + interrupts = ; + reg = <0x17c27000 0x1000>; + status = "disabled"; + }; + + frame@17c29000 { + frame-number = <4>; + interrupts = ; + reg = <0x17c29000 0x1000>; + status = "disabled"; + }; + + frame@17c2b000 { + frame-number = <5>; + interrupts = ; + reg = <0x17c2b000 0x1000>; + status = "disabled"; + }; + + frame@17c2d000 { + frame-number = <6>; + interrupts = ; + reg = <0x17c2d000 0x1000>; + status = "disabled"; + }; + }; +}; +