diff --git a/qcom/sm8150-pinctrl.dtsi b/qcom/sm8150-pinctrl.dtsi
index d5ed5e8f..978ab2ab 100644
--- a/qcom/sm8150-pinctrl.dtsi
+++ b/qcom/sm8150-pinctrl.dtsi
@@ -1639,6 +1639,19 @@
 		};
 
 		qupv3_se17_4uart_pins: qupv3_se17_4uart_pins {
+			qupv3_se17_default_tx: qupv3_se17_default_tx {
+				mux {
+					pins = "gpio45";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio45";
+					drive-strength = <2>;
+					bias-pull-up;
+				};
+			};
+
 			qupv3_se17_default_ctsrtsrx:
 				qupv3_se17_default_ctsrtsrx {
 				mux {
@@ -1653,19 +1666,6 @@
 				};
 			};
 
-			qupv3_se17_default_tx: qupv3_se17_default_tx {
-				mux {
-					pins = "gpio45";
-					function = "gpio";
-				};
-
-				config {
-					pins = "gpio45";
-					drive-strength = <2>;
-					bias-pull-up;
-				};
-			};
-
 			qupv3_se17_ctsrx: qupv3_se17_ctsrx {
 				mux {
 					pins = "gpio43", "gpio46";
diff --git a/qcom/sm8150-qupv3.dtsi b/qcom/sm8150-qupv3.dtsi
index a6fff743..be6c9eb2 100644
--- a/qcom/sm8150-qupv3.dtsi
+++ b/qcom/sm8150-qupv3.dtsi
@@ -533,11 +533,11 @@
 
 		/* GNSS UART Instance */
 		qupv3_se9_2uart: qcom,qup_uart@a84000 {
-			compatible = "qcom,geni-debug-uart";
+			compatible = "qcom,msm-geni-serial-hs";
 			reg = <0xa84000 0x4000>;
 			reg-names = "se_phys";
 			interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
-			clock-names = "se";
+			clock-names = "se-clk";
 			clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
 			interconnect-names = "qup-core", "qup-config", "qup-memory";
 			interconnects =
@@ -941,6 +941,8 @@
 						<&qupv3_se17_tx>;
 			pinctrl-2 = <&qupv3_se17_ctsrx>, <&qupv3_se17_rts>,
 						<&qupv3_se17_tx>;
+			pinctrl-3 = <&qupv3_se17_default_ctsrtsrx>,
+						<&qupv3_se17_default_tx>;
 			qcom,wakeup-byte = <0xFD>;
 			status = "disabled";
 		};