diff --git a/bindings/arm/msm/mpm_counter.yaml b/bindings/arm/msm/mpm_counter.yaml
new file mode 100644
index 00000000..ac1a7954
--- /dev/null
+++ b/bindings/arm/msm/mpm_counter.yaml
@@ -0,0 +1,36 @@
+%YAML 1.2
+---
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MSM MPM sleep counter (mpm-v2)
+
+maintainers:
+  - Prakruthi Deepak Heragu <pheragu@quicinc.com>
+
+description: |
+  The MPM provides a timetick that starts when the device is powered up and
+  is not reset by any of the boot loaders or the HLOS. The MPM timetick counter
+  driver provides an api to get this value.
+
+properties:
+  compatible:
+    const: qcom,mpm2-sleep-counter
+
+  reg:
+    description: Specifies the physical address of the timetick count register.
+
+  clock-frequency:
+    description: the physical counter frequency.
+
+required:
+  - compatible
+  - reg
+
+example:
+  - |
+    qcom,mpm2-sleep-counter@4a3000 {
+      compatible = "qcom,mpm2-sleep-counter";
+      reg = <0x4a3000 0x1000>;
+      clock-frequency = <32768>;
+    };
+
diff --git a/qcom/kalama.dtsi b/qcom/kalama.dtsi
index fdc43397..2c5ed244 100644
--- a/qcom/kalama.dtsi
+++ b/qcom/kalama.dtsi
@@ -628,6 +628,54 @@
 		interrupt-controller;
 	};
 
+	qcom,msm-imem@146aa000 {
+		compatible = "qcom,msm-imem";
+		reg = <0x146aa000 0x1000>;
+		ranges = <0x0 0x146aa000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		mem_dump_table@10 {
+			compatible = "qcom,msm-imem-mem_dump_table";
+			reg = <0x10 0x8>;
+		};
+
+		restart_reason@65c {
+			compatible = "qcom,msm-imem-restart_reason";
+			reg = <0x65c 0x4>;
+		};
+
+		dload_type@1c {
+			compatible = "qcom,msm-imem-dload-type";
+			reg = <0x1c 0x4>;
+		};
+
+		boot_stats@6b0 {
+			compatible = "qcom,msm-imem-boot_stats";
+			reg = <0x6b0 0x20>;
+		};
+
+		kaslr_offset@6d0 {
+			compatible = "qcom,msm-imem-kaslr_offset";
+			reg = <0x6d0 0xc>;
+		};
+
+		pil@94c {
+			compatible = "qcom,pil-reloc-info";
+			reg = <0x94c 0xc8>;
+		};
+
+		pil@6dc {
+			compatible = "qcom,msm-imem-pil-disable-timeout";
+			reg = <0x6dc 0x4>;
+		};
+
+		diag_dload@c8 {
+			compatible = "qcom,msm-imem-diag-dload";
+			reg = <0xc8 0xc8>;
+		};
+	};
+
 	tlmm: pinctrl@f000000 {
 		compatible = "qcom,kalama-pinctrl";
 		reg = <0x0F000000 0x1000000>;
@@ -1236,6 +1284,12 @@
 	      compatible = "syscon";
 	      reg = <0x1fc0000 0x30000>;
 	};
+
+	qcom,mpm2-sleep-counter@c221000 {
+		compatible = "qcom,mpm2-sleep-counter";
+		reg = <0xc221000 0x1000>;
+		clock-frequency = <32768>;
+	};
 };
 
 &firmware {