From b50997f1f7bf7b10a45ce04e71eeb0e0d402a5da Mon Sep 17 00:00:00 2001 From: Prashanth K Date: Fri, 1 Jul 2022 10:49:05 +0530 Subject: [PATCH] ARM: dts: msm: Update ssphy & hsphy on RU/DU DT files Remove the usb2_phy0 and usb_qmp_phy nodes from soc on cinder-ru/du device tree files. Change-Id: Iea3a13f6b6fafb2abef702bb547c102a47585879 --- qcom/cinder-du.dtsi | 25 ++++++++++++------------- qcom/cinder-ru.dtsi | 25 ++++++++++++------------- 2 files changed, 24 insertions(+), 26 deletions(-) diff --git a/qcom/cinder-du.dtsi b/qcom/cinder-du.dtsi index 6d8e47db..50b63e07 100644 --- a/qcom/cinder-du.dtsi +++ b/qcom/cinder-du.dtsi @@ -148,18 +148,17 @@ reg = <0x0 0xc3200000 0x0 0x12c00000>; }; }; -&soc { - usb2_phy0 { - vdd-supply = <&L8A>; - vdda18-supply = <&L14A>; - vdda33-supply = <&L2A>; - qcom,vdd-voltage-level = <0 888000 920000>; - }; - usb_qmp_phy { - vdd-supply = <&L8A>; - qcom,vdd-voltage-level = <0 888000 920000>; - qcom,vdd-max-load-uA = <47000>; - core-supply = <&L3A>; - }; +&usb2_phy0 { + vdd-supply = <&L8A>; + vdda18-supply = <&L14A>; + vdda33-supply = <&L2A>; + qcom,vdd-voltage-level = <0 888000 920000>; +}; + +&usb_qmp_phy { + vdd-supply = <&L8A>; + qcom,vdd-voltage-level = <0 888000 920000>; + qcom,vdd-max-load-uA = <47000>; + core-supply = <&L3A>; }; diff --git a/qcom/cinder-ru.dtsi b/qcom/cinder-ru.dtsi index 67ed0621..8d8f961a 100644 --- a/qcom/cinder-ru.dtsi +++ b/qcom/cinder-ru.dtsi @@ -143,18 +143,17 @@ reg = <0x0 0xb4e00000 0x0 0x3200000>; }; }; -&soc { - usb2_phy0 { - vdd-supply = <&L5A>; - vdda18-supply = <&L14A>; - vdda33-supply = <&L2A>; - qcom,vdd-voltage-level = <0 880000 920000>; - }; - usb_qmp_phy { - vdd-supply = <&L5A>; - qcom,vdd-voltage-level = <0 880000 920000>; - qcom,vdd-max-load-uA = <47000>; - core-supply = <&L3A>; - }; +&usb2_phy0 { + vdd-supply = <&L5A>; + vdda18-supply = <&L14A>; + vdda33-supply = <&L2A>; + qcom,vdd-voltage-level = <0 880000 920000>; +}; + +&usb_qmp_phy { + vdd-supply = <&L5A>; + qcom,vdd-voltage-level = <0 880000 920000>; + qcom,vdd-max-load-uA = <47000>; + core-supply = <&L3A>; };