From 1174c7058ce37573942df1ae072639a62264c667 Mon Sep 17 00:00:00 2001 From: Raviteja Laggyshetty Date: Fri, 8 Jul 2022 11:22:24 +0530 Subject: [PATCH] dt-bindings: interconnect: add interconnect bindings for MONACO Add interconnect device bindings. These devices can be used to describe any RPM and NoC based interconnect devices. Change-Id: If33017e7a19ba4f2eff3f814f4ffb426e6781158 --- bindings/interconnect/qcom,monaco.txt | 46 +++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 bindings/interconnect/qcom,monaco.txt diff --git a/bindings/interconnect/qcom,monaco.txt b/bindings/interconnect/qcom,monaco.txt new file mode 100644 index 00000000..2ac33b98 --- /dev/null +++ b/bindings/interconnect/qcom,monaco.txt @@ -0,0 +1,46 @@ +QTI MONACO Network-On-Chip interconnect driver binding +----------------------------------------------------------- + +Required properties : +- compatible : shall contain only one of the following: + "qcom,monaco-bimc", + "qcom,monaco-system_noc", + "qcom,monaco-config_noc", + "qcom,monaco-clk_virt", + "qcom,monaco-mmnrt_virt", + "qcom,monaco-mmrt_virt", +- #interconnect-cells : should contain 1 + +reg : specifies the physical base address and size of registers +clocks : list of phandles and specifiers to all interconnect bus clocks +clock-names : clock names should include both "bus" and "bus_a" + +The following are optional properties: + +qcom,util-factor : Parameter that represents the DDR utilization factor + to be used in aggregation scheme. It is represented as + actual util-factor * 100. + +Examples: + +soc { + ... + system_noc: interconnect@1880000 { + reg = <0x1880000 0x5e200>; + compatible = "qcom,monaco-system_noc"; + qcom,util-factor = <142>; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, + <&rpmcc RPM_SMD_SNOC_A_CLK>; + }; + + config_noc: interconnect@1900000 { + reg = <0x1900000 0xa400>; + compatible = "qcom,monaco-config_noc"; + #interconnect-cells = <1>; + clock-names = "bus", "bus_a"; + clocks = <&rpmcc RPM_SMD_CNOC_CLK>, + <&rpmcc RPM_SMD_CNOC_A_CLK>; + }; +};