From 39495e16a3d5941a4b68a1affc6e4aa705d30fa3 Mon Sep 17 00:00:00 2001 From: Akshay Adiga Date: Mon, 27 Jun 2022 15:10:53 +0530 Subject: [PATCH] ARM: dts: msm: Add initial device tree for scuba_auto target Add initial devicetree support for scuba_auto target. Change-Id: I18cafb008b1711ccb68cda2f3f070a1edf449968 --- bindings/arm/msm/msm.txt | 2 + qcom/Makefile | 5 + qcom/scuba_auto-idp.dts | 12 +++ qcom/scuba_auto-idp.dtsi | 1 + qcom/scuba_auto-qrd.dts | 12 +++ qcom/scuba_auto-qrd.dtsi | 1 + qcom/scuba_auto.dtsi | 205 +++++++++++++++++++++++++++++++++++++++ 7 files changed, 238 insertions(+) create mode 100644 qcom/scuba_auto-idp.dts create mode 100644 qcom/scuba_auto-idp.dtsi create mode 100644 qcom/scuba_auto-qrd.dts create mode 100644 qcom/scuba_auto-qrd.dtsi create mode 100644 qcom/scuba_auto.dtsi diff --git a/bindings/arm/msm/msm.txt b/bindings/arm/msm/msm.txt index 67cba9d7..08f42ebd 100644 --- a/bindings/arm/msm/msm.txt +++ b/bindings/arm/msm/msm.txt @@ -315,3 +315,5 @@ compatible = "qcom,quinvm" compatible = "qcom,sdxbaagha-rumi" compatible = "qcom,sdxbaagha-mtp" compatible = "qcom,sdxbaagha-cdp" +compatible = "qcom,sa410m-idp" +compatible = "qcom,sa410m-qrd" diff --git a/qcom/Makefile b/qcom/Makefile index 9b533382..d928ef5c 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -169,6 +169,11 @@ autogvm-overlays-dtb-$(CONFIG_QTI_QUIN_GVM) += $(SA8155_LA_GVM_BOARDS) $(SA8155_ dtb-y += $(autogvm-dtb-y) +scuba_auto-dtb-$(CONFIG_ARCH_SCUBA_AUTO) += \ + scuba_auto-idp.dtb \ + scuba_auto-qrd.dtb +dtb-y += $(scuba_auto-dtb-y) + endif ifeq ($(CONFIG_ARCH_KALAMA), y) diff --git a/qcom/scuba_auto-idp.dts b/qcom/scuba_auto-idp.dts new file mode 100644 index 00000000..966b14f1 --- /dev/null +++ b/qcom/scuba_auto-idp.dts @@ -0,0 +1,12 @@ +/dts-v1/; + +#include "scuba_auto.dtsi" +#include "scuba_auto-idp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SCUBA AUTO IDP"; + compatible = "qcom,sa410m", "qcom,idp", "qcom,sa410m-idp"; + qcom,msm-id = <441 0x10000>, <471 0x10000>; + qcom,board-id = <34 0x0>; +}; + diff --git a/qcom/scuba_auto-idp.dtsi b/qcom/scuba_auto-idp.dtsi new file mode 100644 index 00000000..7b45a9d4 --- /dev/null +++ b/qcom/scuba_auto-idp.dtsi @@ -0,0 +1 @@ +&soc { } ; diff --git a/qcom/scuba_auto-qrd.dts b/qcom/scuba_auto-qrd.dts new file mode 100644 index 00000000..0d1b267f --- /dev/null +++ b/qcom/scuba_auto-qrd.dts @@ -0,0 +1,12 @@ +/dts-v1/; + +#include "scuba_auto.dtsi" +#include "scuba_auto-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SCUBA AUTO QRD"; + compatible = "qcom,sa410m", "qcom,qrd", "qcom,sa410m-qrd"; + qcom,msm-id = <441 0x10000>, <471 0x10000>; + qcom,board-id = <11 0x0>; +}; + diff --git a/qcom/scuba_auto-qrd.dtsi b/qcom/scuba_auto-qrd.dtsi new file mode 100644 index 00000000..7b45a9d4 --- /dev/null +++ b/qcom/scuba_auto-qrd.dtsi @@ -0,0 +1 @@ +&soc { } ; diff --git a/qcom/scuba_auto.dtsi b/qcom/scuba_auto.dtsi new file mode 100644 index 00000000..2e290f16 --- /dev/null +++ b/qcom/scuba_auto.dtsi @@ -0,0 +1,205 @@ +#include +#include + +/ { + + model = "Qualcomm Technologies, Inc. SCUBA_AUTO"; + compatible = "qcom,sa410m"; + qcom,msm-id = <441 0x10000>, <471 0x10000>; + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + memory { device_type = "memory"; reg = <0 0 0 0>; }; + + reserved_memory: reserved-memory { }; + + chosen: chosen { }; + + aliases { }; + + firmware: firmware {}; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + }; + + L1_I_0: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_0: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L1_I_1: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_1: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L1_I_2: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_2: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + L1_I_3: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_3: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + }; + }; + + soc: soc { }; +}; + +&soc { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + intc: interrupt-controller@f200000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + interrupt-parent = <&intc>; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + reg = <0xf200000 0x10000>, /* GICD */ + <0xf300000 0x100000>; /* GICR * 8 */ + interrupts = ; + #gpio-cells = <0>; + }; + + arch_timer: timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + clock-frequency = <19200000>; + }; + + memtimer: timer@f120000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0xf120000 0x1000>; + clock-frequency = <19200000>; + + frame@f121000 { + frame-number = <0>; + interrupts = , + ; + reg = <0xf121000 0x1000>, + <0xf122000 0x1000>; + }; + + frame@f123000 { + frame-number = <1>; + interrupts = ; + reg = <0xf123000 0x1000>; + status = "disabled"; + }; + + frame@f124000 { + frame-number = <2>; + interrupts = ; + reg = <0xf124000 0x1000>; + status = "disabled"; + }; + + frame@f125000 { + frame-number = <3>; + interrupts = ; + reg = <0xf125000 0x1000>; + status = "disabled"; + }; + + frame@f126000 { + frame-number = <4>; + interrupts = ; + reg = <0xf126000 0x1000>; + status = "disabled"; + }; + + frame@f127000 { + frame-number = <5>; + interrupts = ; + reg = <0xf127000 0x1000>; + status = "disabled"; + }; + + frame@f128000 { + frame-number = <6>; + interrupts = ; + reg = <0xf128000 0x1000>; + status = "disabled"; + }; + }; + + +}; +