diff --git a/bindings/soc/qcom/qcom,gic-interrupt-router.yaml b/bindings/soc/qcom/qcom,gic-interrupt-router.yaml
new file mode 100644
index 00000000..357b4440
--- /dev/null
+++ b/bindings/soc/qcom/qcom,gic-interrupt-router.yaml
@@ -0,0 +1,31 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/qcom/qcom,gic-interrupt-router.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. GIC Interrupt Router
+
+properties:
+  compatible:
+    Usage: required
+    Value type: <string>
+    Definition: Must be "qcom,gic-intr-routing"
+
+  qcom,gic-class0-cpus:
+    Usage: required
+    Value type: <prop-encoded-array>
+    Definition: List of CPUs in GIC class 0.
+
+  qcom,gic-class1-cpus:
+    Usage: required
+    Value type: <prop-encoded-array>
+    Definition: List of CPUs in GIC class 1.
+
+examples:
+  - |+
+    qcom,gic-interrupt-router {
+      compatible = "qcom,gic-intr-routing";
+      qcom,gic-class0-cpus = <0 1 2 3>;
+      qcom,gic-class1-cpus = <4 5 6 7>;
+    };
+...
diff --git a/qcom/kalama.dtsi b/qcom/kalama.dtsi
index 2d69b939..78d0efc6 100644
--- a/qcom/kalama.dtsi
+++ b/qcom/kalama.dtsi
@@ -1450,6 +1450,14 @@
 		status = "ok";
 	};
 
+	gic-interrupt-router {
+		compatible = "qcom,gic-intr-routing";
+		/* keep silver core only to avoid wakeup of gold cores */
+		qcom,gic-class0-cpus = <0 1 2>;
+		/* keep gold and gold+ cores in class1 */
+		qcom,gic-class1-cpus = <3 4 5 6 7>;
+	};
+
 	qcom,secure-buffer {
 		compatible = "qcom,secure-buffer";
 		qcom,vmid-cp-camera-preview-ro;