From 484a23a8e7c54fb35d6c724acd467bd13c7a3d15 Mon Sep 17 00:00:00 2001
From: Rakesh Kota <kotarake@qti.qualcomm.com>
Date: Fri, 1 Jul 2022 23:12:05 +0530
Subject: [PATCH] ARM: dts: msm: Update PMIC_ARB address and ADC_TM for CINDER

Update the PMIC ARBITER address+size and correct ADC_TM channel
numbers for CINDER platform.

Change-Id: I052f2ba3ec155b1b08ca845035242a321efdc901
---
 qcom/cinder-pmic-overlay.dtsi | 20 ++++++++++----------
 qcom/cinder-regulators.dtsi   |  2 +-
 qcom/cinder.dtsi              | 11 ++++++-----
 3 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/qcom/cinder-pmic-overlay.dtsi b/qcom/cinder-pmic-overlay.dtsi
index 127b86f3..c3d08431 100644
--- a/qcom/cinder-pmic-overlay.dtsi
+++ b/qcom/cinder-pmic-overlay.dtsi
@@ -5,7 +5,7 @@
 		reg = <ADC5_XO_THERM_100K_PU>;
 		label = "xo_therm";
 		qcom,ratiometric;
-		qcom,hw-settle-time = <200>;
+		qcom,hw-settle-time = <1>;
 		qcom,pre-scaling = <1 1>;
 	};
 
@@ -13,24 +13,24 @@
 		reg = <ADC5_AMUX_THM1_100K_PU>;
 		label = "amux_therm1";
 		qcom,ratiometric;
-		qcom,hw-settle-time = <200>;
+		qcom,hw-settle-time = <1>;
 		qcom,pre-scaling = <1 1>;
 	};
 };
 
 &pm8150_adc_tm {
-	io-channels = <&pm8150_vadc ADC5_XO_THERM_100K_PU>,
-		      <&pm8150_vadc ADC5_AMUX_THM1_100K_PU>;
 	xo_therm {
-		reg = <ADC5_XO_THERM_100K_PU>;
+		reg = <0>;
+		io-channels = <&pm8150_vadc ADC5_XO_THERM_100K_PU>;
 		qcom,ratiometric;
-		qcom,hw-settle-time = <200>;
+		qcom,hw-settle-time = <1>;
 	};
 
 	amux_therm1 {
-		reg = <ADC5_AMUX_THM1_100K_PU>;
+		reg = <1>;
+		io-channels = <&pm8150_vadc ADC5_AMUX_THM1_100K_PU>;
 		qcom,ratiometric;
-		qcom,hw-settle-time = <200>;
+		qcom,hw-settle-time = <1>;
 	};
 };
 
@@ -38,7 +38,7 @@
 	sys-therm-0 {
 		polling-delay-passive = <0>;
 		polling-delay = <0>;
-		thermal-sensors = <&pm8150_adc_tm ADC5_XO_THERM_100K_PU>;
+		thermal-sensors = <&pm8150_adc_tm 0>;
 		trips {
 			active-config0 {
 				temperature = <125000>;
@@ -57,7 +57,7 @@
 	sys_therm-1 {
 		polling-delay-passive = <0>;
 		polling-delay = <0>;
-		thermal-sensors = <&pm8150_adc_tm ADC5_AMUX_THM1_100K_PU>;
+		thermal-sensors = <&pm8150_adc_tm 1>;
 		trips {
 			active-config0 {
 				temperature = <125000>;
diff --git a/qcom/cinder-regulators.dtsi b/qcom/cinder-regulators.dtsi
index 58ab153f..420469bc 100644
--- a/qcom/cinder-regulators.dtsi
+++ b/qcom/cinder-regulators.dtsi
@@ -1,6 +1,6 @@
 #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
 
-&apps_rsc {
+&apps_rsc_drv2 {
 	/* RPMh regulators: */
 
 	rpmh-regulator-smpa2 {
diff --git a/qcom/cinder.dtsi b/qcom/cinder.dtsi
index f7dc9cfd..6495aa36 100644
--- a/qcom/cinder.dtsi
+++ b/qcom/cinder.dtsi
@@ -1275,11 +1275,11 @@
 
 	spmi_bus: qcom,spmi@c42d000 {
 		compatible = "qcom,spmi-pmic-arb";
-		reg = <0xc42d000 0x26000>,
-		      <0xc400000 0x1100>,
-		      <0xc500000 0x2000000>,
-		      <0xc440000 0x100000>,
-		      <0xc4c0000 0xa0000>;
+		reg = <0xc42d000 0x4000>,
+		      <0xc400000 0x3000>,
+		      <0xc500000 0x400000>,
+		      <0xc440000 0x80000>,
+		      <0xc4c0000 0x10000>;
 		reg-names = "cnfg", "core", "chnls", "obsrvr", "intr";
 		interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "periph_irq";
@@ -1290,6 +1290,7 @@
 		cell-index = <0>;
 		qcom,channel = <0>;
 		qcom,ee = <0>;
+		qcom,bus-id = <0>;
 	};
 
 	clk_virt: interconnect@0 {