From 489efdb2799ebd8b577113fdc8fc602afa9c69b3 Mon Sep 17 00:00:00 2001
From: Chetan Chinnadagudihundi Ravindranath <cchinnad@qti.qualcomm.com>
Date: Mon, 18 Jul 2022 12:24:49 +0530
Subject: [PATCH] Revert "ARM: dts: msm: Update firmware offsets for Khaje"

This changes is not required so, reverting it.

This reverts commit b6239c95218bb91b05befa62cf749627efbea172.
This reverts commit 1198cae1d64d0ca5006bbe3a874854bb2d916d36.

Change-Id: If639c677b88d3dffc89a5c279ac35be77a47d78c
---
 qcom/khaje.dtsi | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/qcom/khaje.dtsi b/qcom/khaje.dtsi
index d55f5225..ff96e4c9 100644
--- a/qcom/khaje.dtsi
+++ b/qcom/khaje.dtsi
@@ -313,39 +313,39 @@
 			reg = <0x0 0x4ab00000 0x0 0x6900000>;
 		};
 
-		video_mem: video_region@51400000 {
+		pil_video_mem: pil_video_region@51400000 {
 			no-map;
-			reg = <0x0 0x51400000 0x0 0x700000>;
+			reg = <0x0 0x51400000 0x0 0x500000>;
 		};
 
-		wlan_msa_mem: wlan_msa_region@51b00000 {
+		wlan_msa_mem: wlan_msa_region@51900000 {
 			no-map;
-			reg = <0x0 0x51b00000 0x0 0x100000>;
+			reg = <0x0 0x51900000 0x0 0x100000>;
 		};
 
-		pil_cdsp_mem: cdsp_regions@51c00000 {
+		pil_cdsp_mem: cdsp_regions@51a00000 {
 			no-map;
-			reg = <0x0 0x51c00000 0x0 0x1e00000>;
+			reg = <0x0 0x51a00000 0x0 0x1e00000>;
 		};
 
-		pil_adsp_mem: pil_adsp_region@53a00000 {
+		pil_adsp_mem: pil_adsp_region@53800000 {
 			no-map;
-			reg = <0x0 0x53a00000 0x0 0x1e00000>;
+			reg = <0x0 0x53800000 0x0 0x1e00000>;
 		};
 
-		pil_ipa_fw_mem: ipa_fw_region@55800000 {
+		pil_ipa_fw_mem: ipa_fw_region@55600000 {
 			no-map;
-			reg = <0x0 0x55800000 0x0 0x10000>;
+			reg = <0x0 0x55600000 0x0 0x10000>;
 		};
 
-		pil_ipa_gsi_mem: ipa_gsi_region@55810000 {
+		pil_ipa_gsi_mem: ipa_gsi_region@55610000 {
 			no-map;
-			reg = <0x0 0x55810000 0x0 0x5000>;
+			reg = <0x0 0x55610000 0x0 0x5000>;
 		};
 
-		pil_gpu_mem: gpu_region@55815000 {
+		pil_gpu_mem: gpu_region@55615000 {
 			no-map;
-			reg = <0x0 0x55815000 0x0 0x2000>;
+			reg = <0x0 0x55615000 0x0 0x2000>;
 		};
 
 		user_contig_mem: user_contig_region {