From 575bd33b44bc35d81793c1d6e339ecfa871aedc5 Mon Sep 17 00:00:00 2001 From: Anil Veshala Veshala Date: Thu, 19 May 2022 11:38:26 -0700 Subject: [PATCH] ARM: dts: msm: add AHB clocks for LEVM In case, Resource voting like clock/interconnect/pinctrl etc are not supported by LE VM, we can rely on LA enabled resources. But Upstream qup common driver is trying to read qup AHB clocks because of that probe failure is happening. To prevent this issue, Clock team has added dummy clocks and we added AHB clock entries in qup common node. Change-Id: Ie8c3f3149f19eafbdee1e49ee9036d551a60d3ba --- qcom/kalama-vm.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/qcom/kalama-vm.dtsi b/qcom/kalama-vm.dtsi index e19e0f3e..842c39e3 100644 --- a/qcom/kalama-vm.dtsi +++ b/qcom/kalama-vm.dtsi @@ -417,11 +417,13 @@ reg = <0xac0000 0x2000>; #address-cells = <1>; #size-cells = <1>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; iommus = <&apps_smmu 0xb8 0x0>; qcom,iommu-group = <&qup_iommu_group>; dma-coherent; ranges; - qcom,not-la-vm; status = "ok"; qupv3_se4_i2c: i2c@a90000 { @@ -485,11 +487,13 @@ reg = <0x8c0000 0x2000>; #address-cells = <1>; #size-cells = <1>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; iommus = <&apps_smmu 0x438 0x0>; qcom,iommu-group = <&qup_iommu_group>; dma-coherent; ranges; - qcom,not-la-vm; status = "ok"; qupv3_se8_i2c: i2c@880000 {