diff --git a/qcom/sa410m-emmc-ccard.dts b/qcom/sa410m-emmc-ccard.dts
index 5b4d3354..3d248334 100644
--- a/qcom/sa410m-emmc-ccard.dts
+++ b/qcom/sa410m-emmc-ccard.dts
@@ -8,3 +8,7 @@
 	qcom,msm-id=<560 0x10000>;
 	qcom,board-id = <25 0x0>;
 };
+
+&qnand_1 {
+	status = "disabled";
+};
diff --git a/qcom/sa410m-emmc-idp.dts b/qcom/sa410m-emmc-idp.dts
index 18b4a2ea..9fc63fa4 100644
--- a/qcom/sa410m-emmc-idp.dts
+++ b/qcom/sa410m-emmc-idp.dts
@@ -8,3 +8,7 @@
 	qcom,msm-id=<560 0x10000>;
 	qcom,board-id = <34 0x0>;
 };
+
+&qnand_1 {
+	status = "disabled";
+};
diff --git a/qcom/sa410m-idp.dtsi b/qcom/sa410m-idp.dtsi
index 2b370bea..dbb2d010 100644
--- a/qcom/sa410m-idp.dtsi
+++ b/qcom/sa410m-idp.dtsi
@@ -1 +1,5 @@
 #include "sa410m.dtsi"
+
+&qnand_1 {
+	status = "ok";
+};
diff --git a/qcom/sa410m-nand-ccard.dts b/qcom/sa410m-nand-ccard.dts
index ceabcdc9..3ba0a6f2 100644
--- a/qcom/sa410m-nand-ccard.dts
+++ b/qcom/sa410m-nand-ccard.dts
@@ -8,3 +8,7 @@
 	qcom,msm-id=<560 0x10000>;
 	qcom,board-id = <25 0x1>;
 };
+
+&qnand_1 {
+	status = "ok";
+};
diff --git a/qcom/sa410m-nand-idp.dts b/qcom/sa410m-nand-idp.dts
index 2a1dbad9..35baded8 100644
--- a/qcom/sa410m-nand-idp.dts
+++ b/qcom/sa410m-nand-idp.dts
@@ -8,3 +8,7 @@
 	qcom,msm-id=<560 0x10000>;
 	qcom,board-id = <34 0x1>;
 };
+
+&qnand_1 {
+	status = "ok";
+};
diff --git a/qcom/sa410m-rumi.dtsi b/qcom/sa410m-rumi.dtsi
index 68daf13f..7239e490 100644
--- a/qcom/sa410m-rumi.dtsi
+++ b/qcom/sa410m-rumi.dtsi
@@ -37,3 +37,8 @@
 	clocks = <&bi_tcxo>, <&bi_tcxo_ao>, <&pcie_0_pipe_clk>,
 		<&sleep_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
 };
+
+&qnand_1 {
+	status = "ok";
+};
+
diff --git a/qcom/sa410m.dtsi b/qcom/sa410m.dtsi
index bd53a80f..29976d6f 100644
--- a/qcom/sa410m.dtsi
+++ b/qcom/sa410m.dtsi
@@ -24,6 +24,7 @@
 
 	aliases {
 		serial0 = &qupv3_se4_2uart;
+		qpic_nand1 = &qnand_1;
 	};
 
 	firmware: firmware {};
@@ -480,6 +481,33 @@
 		compatible = "qcom,msm-sps-4k";
 		qcom,pipe-attr-ee;
 	};
+
+	qnand_1: nand@0x4840000 {
+		compatible = "qcom,msm-nand";
+		reg =   <0x4840000 0x1000>,
+			<0x4844000 0x1c000>;
+		reg-names =     "nand_phys",
+				"bam_phys";
+		qcom,reg-adjustment-offset = <0x4000>;
+		interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "bam_irq";
+		clock-names = "core_clk";
+		clocks = <&rpmcc RPM_SMD_QPIC_CLK>;
+
+		//interconnects = <&system_noc MASTER_QPIC &mc_virt SLAVE_EBI1>;
+		interconnect-names = "nand-ddr";
+		qcom,msm-bus,name = "qpic_nand";
+		qcom,msm-bus,num-cases = <2>;
+		qcom,msm-bus,num-paths = <1>;
+		qcom,msm-bus,vectors-KBps =
+			<0 0>,
+		/* Voting for max b/w on PNOC bus for now */
+			<1057800 725760>;
+
+		iommus = <&apps_smmu 0x100 0x7>;
+		qcom,iommu-dma = "bypass";
+		status = "disabled";
+	};
 };
 
 #include "sa410m-stub-regulators.dtsi"