From 16e2759515bb5fd03170dbd53604c28b2bd816a0 Mon Sep 17 00:00:00 2001 From: Anurag Chouhan Date: Mon, 7 Nov 2022 11:32:36 +0530 Subject: [PATCH] ARM: dts: qcom: Add interconnect and smr handoff for monaco Add interconnect and smr handoff entry for monaco smmu. Change-Id: I0c36f30bfabc06c3cf2a0efb38ca6449d66744c3 --- qcom/msm-arm-smmu-monaco.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/qcom/msm-arm-smmu-monaco.dtsi b/qcom/msm-arm-smmu-monaco.dtsi index 5ae347c6..f1a4d55a 100644 --- a/qcom/msm-arm-smmu-monaco.dtsi +++ b/qcom/msm-arm-smmu-monaco.dtsi @@ -57,6 +57,7 @@ #iommu-cells = <2>; qcom,skip-init; qcom,use-3-lvl-tables; + qcom,handoff-smrs = <0x420 0x2>; #global-interrupts = <1>; #size-cells = <1>; #address-cells = <1>; @@ -127,7 +128,11 @@ , ; + interconnects = <&bimc MASTER_AMPSS_M0 + &system_noc SLAVE_TCU>; + qcom,active-only; + qcom,actlr = /* For rt TBU +3 deep PF */ <0x400 0x3ff 0x103>, @@ -140,6 +145,10 @@ <0xc7f2200 0x8>; reg-names = "base", "status-reg"; qcom,stream-id-range = <0x0 0x400>; + interconnects = <&bimc MASTER_AMPSS_M0 + &config_noc SLAVE_IMEM_CFG>, + <&bimc MASTER_AMPSS_M0 + &system_noc SLAVE_TCU>; qcom,active-only; qcom,iova-width = <36>; }; @@ -152,6 +161,10 @@ qcom,stream-id-range = <0x400 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc>; + interconnects = <&mmrt_virt MASTER_MDP_PORT0 + &mmrt_virt SLAVE_SNOC_BIMC_RT>, + <&bimc MASTER_AMPSS_M0 + &system_noc SLAVE_TCU>; qcom,active-only; qcom,iova-width = <36>; }; @@ -164,6 +177,10 @@ qcom,stream-id-range = <0x800 0x400>; qcom,regulator-names = "vdd"; vdd-supply = <&hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc>; + interconnects = <&mmnrt_virt MASTER_CAMNOC_SF + &mmnrt_virt SLAVE_SNOC_BIMC_NRT>, + <&bimc MASTER_AMPSS_M0 + &system_noc SLAVE_TCU>; qcom,active-only; qcom,iova-width = <36>; };