diff --git a/qcom/khaje-usb.dtsi b/qcom/khaje-usb.dtsi
index cfdefc72..b9fe6957 100644
--- a/qcom/khaje-usb.dtsi
+++ b/qcom/khaje-usb.dtsi
@@ -24,11 +24,10 @@
 		clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
 			<&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>,
 			<&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
-			<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
 			<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
 			<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
 		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
-				"xo", "sleep_clk", "utmi_clk";
+				"sleep_clk", "utmi_clk";
 
 		resets = <&gcc GCC_USB30_PRIM_BCR>;
 		reset-names = "core_reset";
@@ -111,8 +110,9 @@
 		qcom,vdd-voltage-level = <0 880000 880000>;
 
 		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+			<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
 			<&gcc GCC_AHB2PHY_USB_CLK>;
-		clock-names =  "ref_clk_src", "cfg_ahb_clk";
+		clock-names =  "ref_clk_src", "ref_clk", "cfg_ahb_clk";
 
 		resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
 		reset-names = "phy_reset";
@@ -136,12 +136,13 @@
 			 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK_SRC>,
 			 <&usb3_phy_wrapper_gcc_usb30_pipe_clk>,
 			 <&rpmcc RPM_SMD_XO_CLK_SRC>,
+			 <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
 			 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
 			 <&gcc GCC_AHB2PHY_USB_CLK>;
 
 		clock-names = "aux_clk", "pipe_clk", "pipe_clk_mux",
 				"pipe_clk_ext_src", "ref_clk_src",
-				"com_aux_clk","cfg_ahb_clk";
+				"ref_clk", "com_aux_clk","cfg_ahb_clk";
 
 		resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
 			 <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>;
diff --git a/qcom/sm8150-usb.dtsi b/qcom/sm8150-usb.dtsi
index a07e028a..d1e371eb 100644
--- a/qcom/sm8150-usb.dtsi
+++ b/qcom/sm8150-usb.dtsi
@@ -24,15 +24,10 @@
 			<&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
 			<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
 			<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
-			<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
-			/*
-			 * GCC_USB3_SEC_CLKREF_CLK provides ref_clk for both
-			 * USB instances. Hence GCC_USB3_PRIM_CLKREF_CLK is not
-			 * used here.
-			 */
-			<&gcc GCC_USB3_SEC_CLKREF_CLK>;
+			<&gcc GCC_USB30_PRIM_SLEEP_CLK>;
+
 		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
-				"utmi_clk", "sleep_clk", "xo";
+				"utmi_clk", "sleep_clk";
 
 		resets = <&gcc GCC_USB30_PRIM_BCR>;
 		reset-names = "core_reset";
@@ -78,8 +73,9 @@
 		vdda33-supply = <&L2A>;
 		qcom,vdd-voltage-level = <0 880000 880000>;
 
-		clocks = <&rpmhcc RPMH_CXO_CLK>;
-		clock-names = "ref_clk_src";
+		clocks = <&rpmhcc RPMH_CXO_CLK>,
+			 <&gcc GCC_USB3_SEC_CLKREF_CLK>;
+		clock-names = "ref_clk_src", "ref_clk";
 
 		resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
 		reset-names = "phy_reset";
@@ -116,10 +112,10 @@
 			<&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
 			<&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
 			<&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
-			<&gcc GCC_USB30_SEC_SLEEP_CLK>,
-			<&gcc GCC_USB3_SEC_CLKREF_CLK>;
+			<&gcc GCC_USB30_SEC_SLEEP_CLK>;
+
 		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
-					"utmi_clk", "sleep_clk", "xo";
+					"utmi_clk", "sleep_clk";
 
 		resets = <&gcc GCC_USB30_SEC_BCR>;
 		reset-names = "core_reset";
@@ -168,8 +164,9 @@
 		vdda33-supply = <&L2A>;
 		qcom,vdd-voltage-level = <0 880000 880000>;
 
-		clocks = <&rpmhcc RPMH_CXO_CLK>;
-		clock-names = "ref_clk_src";
+		clocks = <&rpmhcc RPMH_CXO_CLK>,
+			 <&gcc GCC_USB3_SEC_CLKREF_CLK>;
+		clock-names = "ref_clk_src", "ref_clk";
 
 		resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
 		reset-names = "phy_reset";
diff --git a/qcom/waipio-usb.dtsi b/qcom/waipio-usb.dtsi
index 37273722..e4e1b449 100644
--- a/qcom/waipio-usb.dtsi
+++ b/qcom/waipio-usb.dtsi
@@ -16,10 +16,9 @@
 			<&clock_gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
 			<&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
 			<&clock_gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
-			<&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>,
-			<&clock_gcc GCC_USB3_0_CLKREF_EN>;
+			<&clock_gcc GCC_USB30_PRIM_SLEEP_CLK>;
 		clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
-					"utmi_clk", "sleep_clk", "xo";
+					"utmi_clk", "sleep_clk";
 
 		resets = <&clock_gcc GCC_USB30_PRIM_BCR>;
 		reset-names = "core_reset";
@@ -117,8 +116,9 @@
 		vdda33-supply = <&pm8350_l2>;
 		qcom,vdd-voltage-level = <0 880000 880000>;
 
-		clocks = <&clock_rpmh RPMH_CXO_CLK>;
-		clock-names = "ref_clk_src";
+		clocks = <&clock_rpmh RPMH_CXO_CLK>,
+			 <&clock_gcc GCC_USB3_0_CLKREF_EN>;
+		clock-names = "ref_clk_src", "ref_clk";
 
 		resets = <&clock_gcc GCC_QUSB2PHY_PRIM_BCR>;
 		reset-names = "phy_reset";
@@ -140,10 +140,11 @@
 			<&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK_SRC>,
 			<&clock_gcc USB3_PHY_WRAPPER_GCC_USB30_PIPE_CLK>,
 			<&clock_rpmh RPMH_CXO_CLK>,
+			<&clock_gcc GCC_USB3_0_CLKREF_EN>,
 			<&clock_gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
 		clock-names = "aux_clk", "pipe_clk", "pipe_clk_mux",
 				"pipe_clk_ext_src", "ref_clk_src",
-				"com_aux_clk";
+				"ref_clk", "com_aux_clk";
 
 		resets = <&clock_gcc GCC_USB3_DP_PHY_PRIM_BCR>,
 			<&clock_gcc GCC_USB3_PHY_PRIM_BCR>;