From 76c7fdbaf6063d9a85102bdcafc6ead3dcc3a223 Mon Sep 17 00:00:00 2001
From: Kavya Nunna <knunna@qti.qualcomm.com>
Date: Tue, 27 Sep 2022 17:18:01 +0530
Subject: [PATCH] ARM: dts: msm: Add PMX35 PMIC devices

Add SPMI slave device for PMX35, and some of its peripheral devices.

Change-Id: If4cbefc7dd94db65d66b44980b1366d356b65671
---
 qcom/pmx35.dtsi | 75 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 qcom/pmx35.dtsi

diff --git a/qcom/pmx35.dtsi b/qcom/pmx35.dtsi
new file mode 100644
index 00000000..4ec5ef1f
--- /dev/null
+++ b/qcom/pmx35.dtsi
@@ -0,0 +1,75 @@
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+	#address-cells = <2>;
+	#size-cells = <0>;
+	interrupt-controller;
+	#interrupt-cells = <4>;
+
+	qcom,pmx35@0 {
+		compatible = "qcom,spmi-pmic";
+		reg = <1 SPMI_USID>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pmx35_tz: qcom,temp-alarm@a00 {
+			compatible = "qcom,spmi-temp-alarm";
+			reg = <0xa00>;
+			interrupts = <0x0 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
+			#thermal-sensor-cells = <0>;
+		};
+
+		pon_hlos@1300 {
+			compatible = "qcom,pm8998-pon";
+			reg = <0x1300>, <0x800>;
+			reg-names = "pon_hlos", "pon_pbs";
+			qcom,log-kpd-event;
+
+			pwrkey {
+				compatible = "qcom,pmk8350-pwrkey";
+				interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
+				linux,code = <KEY_POWER>;
+			};
+
+			resin{
+				compatible = "qcom,pmk8350-resin";
+				interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
+				linux,code = <KEY_VOLUMEDOWN>;
+			};
+		};
+
+
+		pmx35_vbus_detect: qcom,pmd-vbus-det@1900 {
+			compatible = "qcom,pm8941-misc";
+			reg = <0x1900>;
+			interrupts = <0x0 0x19 0x0 IRQ_TYPE_EDGE_BOTH>;
+			interrupt-names = "usb_vbus";
+			status = "disabled";
+		};
+
+		pmx35_gpios: pinctrl@8800 {
+			compatible = "qcom,pmx35-gpio";
+			reg = <0x8800>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		pmx35_pwm: pwms@e800 {
+			compatible = "qcom,pwm-lpg";
+			reg = <0xe800>;
+			reg-names = "lpg-base";
+			#pwm-cells = <2>;
+			qcom,num-lpg-channels = <4>;
+		};
+
+		pmx35_rtc: qcom,pmx35_rtc {
+			compatible = "qcom,pm8941-rtc";
+			reg = <0x6400>, <0x6500>;
+			reg-names = "rtc", "alarm";
+			interrupts = <0x0 0x65 0x1 IRQ_TYPE_NONE>;
+		};
+	};
+};