diff --git a/display/diwali-sde-display-atp.dtsi b/display/diwali-sde-display-atp.dtsi index ff33f68c..9e8f38fd 100644 --- a/display/diwali-sde-display-atp.dtsi +++ b/display/diwali-sde-display-atp.dtsi @@ -40,6 +40,16 @@ qcom,platform-reset-gpio = <&tlmm 42 0>; }; +&dsi_r66451_amoled_120hz_video_cphy { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_extvdd>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 42 0>; +}; + &dsi_r66451_amoled_120hz_cmd_cphy { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_extvdd>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; @@ -124,6 +134,7 @@ &dsi_r66451_amoled_60hz_video &dsi_r66451_amoled_cmd &dsi_r66451_amoled_120hz_cmd_cphy + &dsi_r66451_amoled_120hz_video_cphy &dsi_r66451_amoled_144hz_video_cphy &dsi_r66451_amoled_144hz_cmd_cphy &dsi_r66451_amoled_video_cphy diff --git a/display/diwali-sde-display-common.dtsi b/display/diwali-sde-display-common.dtsi index cf4a36d0..70671fa9 100644 --- a/display/diwali-sde-display-common.dtsi +++ b/display/diwali-sde-display-common.dtsi @@ -17,6 +17,7 @@ #include "dsi-panel-sim-video.dtsi" #include "dsi-panel-sim-dualmipi-cmd.dtsi" #include "dsi-panel-sim-dualmipi-video.dtsi" +#include "dsi-r66451-amoled-120hz-video-cphy.dtsi" #include "diwali-sde-display-pinctrl.dtsi" @@ -269,6 +270,26 @@ }; }; +&dsi_r66451_amoled_120hz_video_cphy { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x1c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + qcom,esd-check-enabled; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 14 1b 05 + 19 06 02 04 00 00 00]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_r66451_amoled_cmd { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; diff --git a/display/dsi-r66451-amoled-120hz-video-cphy.dtsi b/display/dsi-r66451-amoled-120hz-video-cphy.dtsi new file mode 100644 index 00000000..0597425b --- /dev/null +++ b/display/dsi-r66451-amoled-120hz-video-cphy.dtsi @@ -0,0 +1,128 @@ +&mdss_mdp { + dsi_r66451_amoled_120hz_video_cphy: qcom,mdss_dsi_r66451_fhd_plus_cphy_120hz_vid { + qcom,mdss-dsi-panel-name = + "r66451 amoled video mode dsi visionox panel with DSC"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-physical-type = "oled"; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-border-color = <0>; + + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + qcom,adjust-timer-wakeup-ms = <1>; + qcom,panel-cphy-mode; + + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4200000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + qcom,spr-pack-type = "pentile"; + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <96>; + qcom,mdss-dsi-h-back-porch = <40>; + qcom,mdss-dsi-h-pulse-width = <32>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <25>; + qcom,mdss-dsi-v-pulse-width = <1>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 02 b0 00 + 39 01 00 00 00 00 02 b3 01 + 39 01 00 00 00 00 02 b0 04 + 39 01 00 00 00 00 03 e8 00 02 + 39 01 00 00 00 00 03 e4 00 08 + 39 01 00 00 00 00 03 b4 20 1c + 39 01 00 00 00 00 0d b6 6c 00 06 23 af + 13 1a 05 04 fa 05 20 + 39 01 00 00 00 00 02 b0 00 + 39 01 00 00 00 00 32 c4 00 00 00 00 00 + 00 00 00 10 00 00 02 00 00 00 29 00 + 01 00 00 00 00 00 00 00 00 00 00 00 + 22 00 00 00 00 11 00 00 0c 00 00 00 + 00 30 00 00 00 00 00 00 + 39 01 00 00 00 00 86 cf 64 0b 00 22 00 + cd 03 33 04 00 0b 77 01 01 01 02 02 + 03 03 04 04 04 04 05 00 00 00 3b 00 + 3b 01 64 01 64 01 64 01 64 01 64 01 + 64 03 ff 03 ff 03 ff 00 00 00 3b 00 + 3b 01 64 01 64 01 64 01 64 01 64 01 + 64 03 ff 03 ff 03 ff 01 62 01 62 01 + 62 01 62 01 62 01 62 01 62 01 62 01 + 62 01 62 01 62 01 62 19 19 19 19 19 + 19 19 19 19 19 19 19 00 00 00 43 00 + 43 01 98 01 98 06 61 06 61 0f f6 0f + f6 0f f6 0f f6 0f f6 19 + 39 01 00 00 00 00 09 d1 05 00 21 02 24 + 19 24 2d + 39 01 00 00 00 00 15 d3 49 00 00 01 1a + 15 00 15 07 0f 77 77 77 37 b2 11 00 + a0 3c 9a + 39 01 00 00 00 00 1a d7 00 b9 34 00 40 + 04 00 f0 0f 00 40 00 00 00 00 00 00 + 19 34 00 40 04 00 f0 0f + 39 01 00 00 00 00 34 d8 00 00 00 00 00 + 00 00 00 00 3a 00 3a 00 3a 00 3a 00 + 3a 05 00 00 00 00 00 00 00 00 00 0f + 00 0f 00 00 00 00 00 00 00 00 00 00 + 00 00 00 0f 00 2f 00 0f 00 20 + 39 01 00 00 00 00 2b df 50 42 58 81 2d + 00 00 00 00 00 00 6b 00 00 00 00 00 + 00 00 00 01 0f ff d4 0e 00 00 00 00 + 00 00 0f 53 18 00 0f 00 00 00 00 00 + 00 + 39 01 00 00 00 00 03 eb 8b 8b + 39 01 00 00 00 00 02 f7 01 + 39 01 00 00 00 00 02 b0 80 + 39 01 00 00 00 00 0a e4 34 b4 00 00 00 + 30 04 0c e2 + 39 01 00 00 00 00 02 e6 00 + 39 01 00 00 00 00 02 b0 04 + 39 01 00 00 00 00 03 df 50 40 + 39 01 00 00 00 00 06 f3 50 00 00 00 00 + 39 01 00 00 00 00 02 f2 11 + 39 01 00 00 00 00 06 f3 01 00 00 00 01 + 39 01 00 00 00 00 03 f4 00 02 + 39 01 00 00 00 00 02 f2 19 + 39 01 00 00 00 00 03 df 50 42 + 39 01 00 00 00 00 05 2a 00 00 04 37 + 39 01 00 00 00 00 05 2b 00 00 09 23 + 05 01 00 00 78 00 01 11 + 05 01 00 00 00 00 01 29 + ]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-slice-height = <20>; + qcom,mdss-dsc-slice-width = <540>; + qcom,mdss-dsc-slice-per-pkt = <2>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +};