diff --git a/qcom/video/Kbuild b/qcom/video/Kbuild new file mode 100644 index 00000000..7852f7d4 --- /dev/null +++ b/qcom/video/Kbuild @@ -0,0 +1,17 @@ + +ifeq ($(CONFIG_ARCH_WAIPIO), y) +dtbo-y += waipio-vidc.dtbo +endif + +ifeq ($(CONFIG_ARCH_KALAMA), y) +dtbo-y += kalama-vidc.dtbo +dtbo-y += kalama-vidc-v2.dtbo +endif + +ifeq ($(CONFIG_ARCH_ANORAK), y) +dtbo-y += anorak-vidc.dtbo +endif + +always-y := $(dtb-y) $(dtbo-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb *.dtbo diff --git a/qcom/video/Makefile b/qcom/video/Makefile new file mode 100644 index 00000000..b1e0dfe9 --- /dev/null +++ b/qcom/video/Makefile @@ -0,0 +1,9 @@ +KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=. + +all: dtbs + +clean: + $(MAKE) -C $(KERNEL_SRC) M=$(M) clean + +%: + $(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS) diff --git a/qcom/video/anorak-vidc.dts b/qcom/video/anorak-vidc.dts new file mode 100644 index 00000000..5b598260 --- /dev/null +++ b/qcom/video/anorak-vidc.dts @@ -0,0 +1,16 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "anorak-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Anorak"; + compatible = "qcom,anorak"; + qcom,msm-id = <549 0x10000>; + qcom,board-id = <0 0>, <0x10021 0x0>, <0x10022 0x0>, <0x10026 0x0>, + <0x10022 0x1>, <0x10022 0x2>, <0x10022 0x3>; +}; diff --git a/qcom/video/anorak-vidc.dtsi b/qcom/video/anorak-vidc.dtsi new file mode 100644 index 00000000..a6de55fb --- /dev/null +++ b/qcom/video/anorak-vidc.dtsi @@ -0,0 +1,110 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-anorak", "qcom,msm-vidc-iris3"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + qcom,proxy-clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <240000000 338000000 + 366000000 444000000 533000000>; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu33_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO + &gem_noc SLAVE_LLCC>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 15000000 + 1000 15000000>; + + /* MMUs */ + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x0987 0x0400>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x0980 0x0400>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x0984 0x0400>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x0981 0x0404>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x0983 0x0400>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; diff --git a/qcom/video/kalama-vidc-v2.dts b/qcom/video/kalama-vidc-v2.dts new file mode 100644 index 00000000..c5a1b4a0 --- /dev/null +++ b/qcom/video/kalama-vidc-v2.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "kalama-vidc-v2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kalama"; + compatible = "qcom,kalama"; + qcom,msm-id = <519 0x20000>, <536 0x20000>, <600 0x20000>, <601 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/qcom/video/kalama-vidc-v2.dtsi b/qcom/video/kalama-vidc-v2.dtsi new file mode 100644 index 00000000..267af479 --- /dev/null +++ b/qcom/video/kalama-vidc-v2.dtsi @@ -0,0 +1,9 @@ + +#include "kalama-vidc.dtsi" + +/* KalamaV2-specific changes */ +&msm_vidc { + qcom,allowed-clock-rates = <240000000 338000000 + 366000000 444000000 533333333>; +}; + diff --git a/qcom/video/kalama-vidc.dts b/qcom/video/kalama-vidc.dts new file mode 100644 index 00000000..20abb835 --- /dev/null +++ b/qcom/video/kalama-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "kalama-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kalama"; + compatible = "qcom,kalama"; + qcom,msm-id = <519 0x10000>, <536 0x10000>, <600 0x10000>, <601 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/qcom/video/kalama-vidc.dtsi b/qcom/video/kalama-vidc.dtsi new file mode 100644 index 00000000..ffbea13e --- /dev/null +++ b/qcom/video/kalama-vidc.dtsi @@ -0,0 +1,112 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-kalama", "qcom,msm-vidc-iris3"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* LLCC Cache */ + cache-slice-names = "vidsc0", "vidvsp"; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + qcom,proxy-clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <240000000 338000000 + 366000000 444000000 481000000>; + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names = "video_axi_reset"; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu30_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO + &gem_noc SLAVE_LLCC>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 15000000 + 1000 15000000>; + + /* MMUs */ + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x1947 0x0000>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x1940 0x0000>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x1944 0x0000>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x1941 0x0004>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x1943 0x0000>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; diff --git a/qcom/video/waipio-vidc.dts b/qcom/video/waipio-vidc.dts new file mode 100644 index 00000000..9f41c180 --- /dev/null +++ b/qcom/video/waipio-vidc.dts @@ -0,0 +1,16 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "waipio-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. waipio v1 SoC"; + compatible = "qcom,waipio"; + qcom,msm-id = <457 0x10000>, <482 0x10000>, + <457 0x20000>, <482 0x20000>; + qcom,board-id = <0 0>; +}; diff --git a/qcom/video/waipio-vidc.dtsi b/qcom/video/waipio-vidc.dtsi new file mode 100644 index 00000000..41311f48 --- /dev/null +++ b/qcom/video/waipio-vidc.dtsi @@ -0,0 +1,118 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-waipio", "qcom,msm-vidc-iris2"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; + clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>, + <&clock_videocc VIDEO_CC_MVS0C_CLK>, + <&clock_videocc VIDEO_CC_MVS0_CLK>, + <&clock_videocc VIDEO_CC_MVS0_CLK_SRC>; + qcom,proxy-clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <239999999 338000000 + 366000000 444000000>; + resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = "video_axi_reset", "video_core_reset"; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO_P0 + &gem_noc SLAVE_LLCC>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 15000000 + 1000 15000000>; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2180 0x0400>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2187 0x0400>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2184 0x0400>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2181 0x0404>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2183 0x0400>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +};