From a2c4ad260867d310eb25a379db46b41043116226 Mon Sep 17 00:00:00 2001
From: Vivek Pernamitta <vpernami@qti.qualcomm.com>
Date: Tue, 15 Nov 2022 10:18:21 +0530
Subject: [PATCH] ARM: dts: msm: Update PCIe RC0 PHY registers for QRD v102

QRD platform has ultrashort PCIe channel for RC0,
update PHY settings for <5DB loss.

Change-Id: Iee5dbae63cfccd4552b21c94901893020f1b2e0c
---
 qcom/kalama-qrd.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/qcom/kalama-qrd.dtsi b/qcom/kalama-qrd.dtsi
index 400e9d0f..3b68e1d4 100644
--- a/qcom/kalama-qrd.dtsi
+++ b/qcom/kalama-qrd.dtsi
@@ -344,7 +344,7 @@
 };
 
 &pcie0 {
-	 qcom,pcie-phy-ver = <101>;
+	 qcom,pcie-phy-ver = <102>;
 			qcom,phy-sequence = <0x0240 0x03 0x0
 					0x00c0 0x01 0x0
 					0x00cc 0x62 0x0
@@ -452,12 +452,12 @@
 					0x060c 0x1d 0x0
 					0x0614 0x07 0x0
 					0x0620 0xc1 0x0
-					0x0368 0x0F 0x0
-					0x1180 0x8C 0x0
-					0x1980 0x8C 0x0
+					0x0368 0x0f 0x0
+					0x1180 0x8f 0x0
+					0x1980 0x8f 0x0
 					0x0120 0x40 0x0
-					0x0080 0x0A 0x0
-					0x0084 0x1A 0x0
+					0x0080 0x0a 0x0
+					0x0084 0x1a 0x0
 					0x0020 0x14 0x0
 					0x0024 0x34 0x0
 					0x0624 0x05 0x0