From c583b5a0413812416e93b9b7e33d3fccc6e90030 Mon Sep 17 00:00:00 2001
From: Singa Reddy Dasari <singredd@qti.qualcomm.com>
Date: Fri, 2 Sep 2022 23:02:09 +0530
Subject: [PATCH] ARM: dts: qcom: Add QUPV3 nodes for sa8155 vm

Add qupv3 for automotive VM platform.

Change-Id: Ic983ac05943d1e45b00424b57ee1313f7f8f7c5c
---
 qcom/sa8155-vm-qupv3.dtsi | 108 ++++++++++++++++++++++++++++++++++++++
 qcom/sa8155-vm.dtsi       |  13 ++++-
 2 files changed, 120 insertions(+), 1 deletion(-)
 create mode 100644 qcom/sa8155-vm-qupv3.dtsi

diff --git a/qcom/sa8155-vm-qupv3.dtsi b/qcom/sa8155-vm-qupv3.dtsi
new file mode 100644
index 00000000..44b37eb5
--- /dev/null
+++ b/qcom/sa8155-vm-qupv3.dtsi
@@ -0,0 +1,108 @@
+&soc {
+	/* QUPv3 SE Instances
+	 * Qup0 0: SE 0
+	 * Qup0 1: SE 1
+	 * Qup0 2: SE 2
+	 * Qup0 3: SE 3
+	 * Qup0 4: SE 4
+	 * Qup0 5: SE 5
+	 * Qup0 6: SE 6
+	 * Qup0 7: SE 7
+	 * Qup1 0: SE 8
+	 * Qup1 1: SE 9
+	 * Qup1 2: SE 10
+	 * Qup1 3: SE 11
+	 * Qup1 4: SE 12
+	 * Qup1 5: SE 13
+	 * Qup2 0: SE 14
+	 * Qup2 1: SE 15
+	 * Qup2 2: SE 16
+	 * Qup2 3: SE 17
+	 * Qup2 4: SE 18
+	 * Qup2 5: SE 19
+	 */
+
+	/* QUPv3_1  wrapper  instance */
+	qupv3_1: qcom,qupv3_1_geni_se@ac0000 {
+		compatible = "qcom,geni-se-qup";
+		reg = <0xac0000 0x6000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clock-names = "m-ahb", "s-ahb";
+		clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
+			<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+		iommus = <&apps_smmu 0x603 0x0>;
+		qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
+		qcom,iommu-geometry = <0x40000000 0x10000000>;
+		qcom,iommu-dma = "fastmap";
+		status = "ok";
+
+		/* Debug UART Instance */
+		qupv3_se12_2uart: qcom,qup_uart@a90000 {
+			compatible = "qcom,geni-debug-uart";
+			reg = <0xa90000 0x4000>;
+			reg-names = "se_phys";
+			interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se";
+			clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se12_2uart_active>;
+			pinctrl-1 = <&qupv3_se12_2uart_sleep>;
+			status = "disabled";
+		};
+	};
+
+	/* QUPv3_2  wrapper  instance */
+	qupv3_2: qcom,qupv3_2_geni_se@cc0000 {
+		compatible = "qcom,geni-se-qup";
+		reg = <0xcc0000 0x6000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		clock-names = "m-ahb", "s-ahb";
+		clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,
+			<&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
+		iommus = <&apps_smmu 0x7a3  0x0>;
+		qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
+		qcom,iommu-geometry = <0x40000000 0x10000000>;
+		qcom,iommu-dma = "fastmap";
+		status = "ok";
+
+		/* HS UART Instance */
+		qupv3_se17_4uart: qcom,qup_uart@c8c000 {
+			compatible = "qcom,msm-geni-serial-hs";
+			reg = <0xc8c000 0x4000>;
+			reg-names = "se_phys";
+			interrupts-extended = <&intc GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>,
+					<&tlmm 46 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
+			pinctrl-names = "default", "active", "sleep", "shutdown";
+			pinctrl-0 = <&qupv3_se17_default_ctsrtsrx>,
+						<&qupv3_se17_default_tx>;
+			pinctrl-1 = <&qupv3_se17_ctsrx>, <&qupv3_se17_rts>,
+						<&qupv3_se17_tx>;
+			pinctrl-2 = <&qupv3_se17_ctsrx>, <&qupv3_se17_rts>,
+						<&qupv3_se17_tx>;
+			pinctrl-3 = <&qupv3_se17_default_ctsrtsrx>,
+						<&qupv3_se17_default_tx>;
+			qcom,wakeup-byte = <0xFD>;
+			status = "disabled";
+		};
+
+		qupv3_se19_i2c: i2c@c94000 {
+			compatible = "qcom,i2c-geni";
+			reg = <0xc94000 0x4000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "se-clk";
+			clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&qupv3_se19_i2c_active>;
+			pinctrl-1 = <&qupv3_se19_i2c_sleep>;
+			status = "disabled";
+		};
+	};
+};
diff --git a/qcom/sa8155-vm.dtsi b/qcom/sa8155-vm.dtsi
index e5291e1f..840e1158 100644
--- a/qcom/sa8155-vm.dtsi
+++ b/qcom/sa8155-vm.dtsi
@@ -1,11 +1,14 @@
 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
 #include "quin-vm-common.dtsi"
 #include "pm8150-vm.dtsi"
-
 / {
 	model = "Qualcomm Technologies, Inc. SA8155 Guest Virtual Machine";
 	qcom,msm-name  = "SA8155 v2";
 	qcom,msm-id = <362 0x20000>;
+	aliases {
+		hsuart0 = &qupv3_se17_4uart;
+		serial0 = &qupv3_se12_2uart;
+	};
 
 	cpus {
 		#address-cells = <2>;
@@ -284,6 +287,7 @@
 
 #include "sm8150-pinctrl.dtsi"
 #include "sa8155-vm-pcie.dtsi"
+#include "sa8155-vm-qupv3.dtsi"
 
 &tlmm {
 	/delete-property/ wakeup-parent;
@@ -392,3 +396,10 @@
 	status = "ok";
 };
 
+&qupv3_se17_4uart {
+	status = "ok";
+};
+
+&qupv3_se12_2uart {
+	status = "disabled";
+};