From 1380a9c3f5211111a23cd43b56b9a56d2eed6a99 Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Wed, 8 Jul 2020 19:50:39 +0530 Subject: [PATCH] dt-bindings: interconnect: update interconnect bindings Update interconnect device bindings. These devices can be used to describe any RPMH and NoC based interconnect devices. Change-Id: Ib20f2a56509528638c4604d2fe8f755f06e25fc4 --- bindings/interconnect/qcom,sm8150.txt | 31 +++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 bindings/interconnect/qcom,sm8150.txt diff --git a/bindings/interconnect/qcom,sm8150.txt b/bindings/interconnect/qcom,sm8150.txt new file mode 100644 index 00000000..a0b636af --- /dev/null +++ b/bindings/interconnect/qcom,sm8150.txt @@ -0,0 +1,31 @@ +Qualcomm Technologies, Inc. SM8150 Network-On-Chip interconnect driver binding +------------------------------------------------------------------------------ + +SM8150 interconnect providers support system bandwidth requirements through +RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is +able to communicate with the BCM through the Resource State Coordinator (RSC) +associated with each execution environment. Provider nodes must point to at +least one RPMh device child node pertaining to their RSC and each provider +can map to multiple RPMh resources. + +Required properties : +- compatible : shall contain only one of the following: + "qcom,sm8150-aggre1_noc"; + "qcom,sm8150-aggre2_noc"; + "qcom,sm8150-camnoc_virt"; + "qcom,sm8150-compute_noc"; + "qcom,sm8150-config_noc"; + "qcom,sm8150-dc_noc"; + "qcom,sm8150-gem_noc"; + "qcom,sm8150-ipa_virt"; + "qcom,sm8150-mc_virt"; + "qcom,sm8150-mmss_noc"; + "qcom,sm8150-system_noc"; +- #interconnect-cells : should contain 1 + +Examples: + +aggre1_noc: interconnect@16e0000 { + compatible = "qcom,sm8150-aggre1_noc"; + interconnect-cells = <1>; +};