From a44a0239c5dffa096fb85c8dedd011f1baba1229 Mon Sep 17 00:00:00 2001
From: Shreyas K K <shrekk@qti.qualcomm.com>
Date: Wed, 22 Jun 2022 23:15:42 +0530
Subject: [PATCH] ARM: dts: qcom: Add ADSP remoteproc in SDMSHRIKE

Add remoteproc device node for ADSP subsystem in
SDMSHRIKE target.

Change-Id: I0528a014bcdb4818bcd4862f5b804f29a55885d7
---
 bindings/remoteproc/qcom,adsp.txt |  1 +
 qcom/sdmshrike.dtsi               | 40 ++++++++++++++++++++++++++++++-
 2 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/bindings/remoteproc/qcom,adsp.txt b/bindings/remoteproc/qcom,adsp.txt
index a02fa9c0..73a0958f 100644
--- a/bindings/remoteproc/qcom,adsp.txt
+++ b/bindings/remoteproc/qcom,adsp.txt
@@ -40,6 +40,7 @@ on the Qualcomm Technologies inc ADSP Hexagon core.
 		    "qcom,khaje-adsp-pas"
 		    "qcom,khaje-cdsp-pas"
 		    "qcom,khaje-modem-pas"
+		    "qcom,sdmshrike-adsp-pas"
 
 - interrupts-extended:
 	Usage: required
diff --git a/qcom/sdmshrike.dtsi b/qcom/sdmshrike.dtsi
index 0e64125e..109d4162 100644
--- a/qcom/sdmshrike.dtsi
+++ b/qcom/sdmshrike.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/interconnect/qcom,icc.h>
 #include <dt-bindings/interconnect/qcom,sc8180x.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 
 / {
@@ -372,7 +373,7 @@
 			reg = <0x0 0x8bd80000 0x0 0x80000>;
 		};
 
-		pil_adsp_mem: pil_adsp_region@8be00000 {
+		rproc_adsp_mem: rproc_adsp_region@8be00000 {
 			no-map;
 			reg = <0x0 0x8be00000 0x0 0x1a00000>;
 		};
@@ -1347,6 +1348,43 @@
 		qcom,count-unit = <0x10000>;
 		qcom,target-dev = <&qcom_ddr_dcvs_hw>;
 	};
+
+	adsp_pas: remoteproc-adsp@17300000 {
+		compatible = "qcom,sdmshrike-adsp-pas";
+		reg = <0x17300000 0x00100>;
+		status = "ok";
+
+		cx-supply = <&VDD_CX_LEVEL>;
+		cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
+		reg-names = "cx";
+
+		clocks = <&rpmhcc RPMH_CXO_CLK>;
+		clock-names = "xo";
+
+		qcom,qmp = <&aoss_qmp>;
+
+		interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
+		interconnect-names = "crypto_ddr";
+
+		memory-region = <&rproc_adsp_mem>;
+
+		/* Inputs from ssc */
+		interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
+					<&adsp_smp2p_in 0 0>,
+					<&adsp_smp2p_in 2 0>,
+					<&adsp_smp2p_in 1 0>,
+					<&adsp_smp2p_in 3 0>;
+
+		interrupt-names = "wdog",
+				"fatal",
+				"handover",
+				"ready",
+				"stop-ack";
+
+		/* Outputs to turing */
+		qcom,smem-states = <&adsp_smp2p_out 0>;
+		qcom,smem-state-names = "stop";
+	};
 };
 
 &firmware {