diff --git a/qcom/sdxpinn-rumi.dtsi b/qcom/sdxpinn-rumi.dtsi index 1d95e9ef..b4e80013 100644 --- a/qcom/sdxpinn-rumi.dtsi +++ b/qcom/sdxpinn-rumi.dtsi @@ -9,3 +9,23 @@ &qupv3_se1_2uart { qcom,rumi_platform; }; + +&SILVER_OFF { + status = "nok"; +}; + +&SILVER_RAIL_OFF { + status = "nok"; +}; + +&CLUSTER_PWR_DN { + status = "nok"; +}; + +&CX_RET { + status = "nok"; +}; + +&APSS_OFF { + status = "nok"; +}; diff --git a/qcom/sdxpinn.dtsi b/qcom/sdxpinn.dtsi index f537e55f..222e0a40 100644 --- a/qcom/sdxpinn.dtsi +++ b/qcom/sdxpinn.dtsi @@ -30,7 +30,10 @@ device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x0>; - enable-method = "spin-table"; + enable-method = "psci"; + cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0x90f00000>; next-level-cache = <&L2_0>; L2_0: l2-cache { @@ -49,7 +52,10 @@ device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x100>; - enable-method = "spin-table"; + enable-method = "psci"; + cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0x90f00000>; L2_1: l2-cache { @@ -63,7 +69,10 @@ device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x200>; - enable-method = "spin-table"; + enable-method = "psci"; + cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0x90f00000>; L2_2: l2-cache { @@ -77,7 +86,10 @@ device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x0 0x300>; - enable-method = "spin-table"; + enable-method = "psci"; + cpu-idle-states = <&SILVER_OFF &SILVER_RAIL_OFF>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; cpu-release-addr = <0x0 0x90f00000>; L2_3: l2-cache { @@ -109,6 +121,57 @@ }; }; + idle-states { + entry-method = "psci"; + + SILVER_OFF: silver-c3 { /* C3 */ + compatible = "arm,idle-state"; + idle-state-name = "pc"; + entry-latency-us = <235>; + exit-latency-us = <428>; + min-residency-us = <1774>; + arm,psci-suspend-param = <0x40000003>; + local-timer-stop; + }; + + SILVER_RAIL_OFF: silver-c4 { /* C4 */ + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <800>; + exit-latency-us = <750>; + min-residency-us = <4090>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; + }; + + CLUSTER_PWR_DN: cluster-d4 { /* D4 */ + compatible = "domain-idle-state"; + idle-state-name = "l3-off"; + entry-latency-us = <1050>; + exit-latency-us = <2500>; + min-residency-us = <5309>; + arm,psci-suspend-param = <0x41000044>; + }; + + CX_RET: cx-ret { /* Cx Ret */ + compatible = "domain-idle-state"; + idle-state-name = "cx-ret"; + entry-latency-us = <2761>; + exit-latency-us = <3964>; + min-residency-us = <8467>; + arm,psci-suspend-param = <0x41001344>; + }; + + APSS_OFF: cluster-e3 { /* E3 */ + compatible = "domain-idle-state"; + idle-state-name = "llcc-off"; + entry-latency-us = <2793>; + exit-latency-us = <4023>; + min-residency-us = <9826>; + arm,psci-suspend-param = <0x4100B344>; + }; + }; + soc: soc { }; }; @@ -135,6 +198,36 @@ ranges = <0 0 0 0xffffffff>; compatible = "simple-bus"; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_PWR_DN &CX_RET &APSS_OFF>; + }; + }; + intc: interrupt-controller@17200000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -157,6 +250,7 @@ interrupts = , , ; + power-domains = <&CLUSTER_PD>; apps_rsc_drv2: drv@2 { qcom,drv-id = <2>; @@ -180,6 +274,11 @@ clock-frequency = <19200000>; }; + cluster-device { + compatible = "qcom,lpm-cluster-dev"; + power-domains = <&CLUSTER_PD>; + }; + memtimer: timer@17420000 { #address-cells = <1>; #size-cells = <1>;