From c5cb6da2f7a118635143a527795360548f80de7f Mon Sep 17 00:00:00 2001
From: Sarthak Garg <sartgarg@qti.qualcomm.com>
Date: Tue, 26 Jul 2022 16:22:43 +0530
Subject: [PATCH] ARM: dts: msm: Add Qpic Nand support for sdxbaagha in device
 tree

Add QPIC NAND Controller support for sdxbaagha in device tree.

Change-Id: I3ba8cb4d5efa58a95fd8b5e79b99766a8c9dae6d
---
 qcom/sdxbaagha.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/qcom/sdxbaagha.dtsi b/qcom/sdxbaagha.dtsi
index c6a980b0..00f612e4 100644
--- a/qcom/sdxbaagha.dtsi
+++ b/qcom/sdxbaagha.dtsi
@@ -311,6 +311,23 @@
 		};
 	};
 
+	qnand_1: nand@1c98000 {
+		compatible = "qcom,msm-nand";
+		reg =   <0x01c98000 0x1000>,
+			<0x01c9c000 0x1c000>;
+		reg-names =     "nand_phys",
+				"bam_phys";
+		qcom,reg-adjustment-offset = <0x4000>;
+
+		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "bam_irq";
+
+		clock-names = "core_clk";
+		clocks = <&rpmhcc RPMH_QPIC_CLK>;
+
+		status = "disabled";
+	};
+
 	qcom,secure-buffer {
 		compatible = "qcom,secure-buffer";
 	};