From 7ad3ea5062cff03acd8ab2a2f3091e9e2e018004 Mon Sep 17 00:00:00 2001
From: Chetan C R <cchinnad@qti.qualcomm.com>
Date: Fri, 4 Nov 2022 18:12:32 +0530
Subject: [PATCH] ARM: dts: qcom: Add clock and interconnect for qrng driver

Add clock and interconnect property for qrng node on
Khaje targets.

Change-Id: Ia38d28e955478a3435d8ff90260eb4e43ad5562a
---
 qcom/khaje.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/qcom/khaje.dtsi b/qcom/khaje.dtsi
index e9e96265..9ffff253 100644
--- a/qcom/khaje.dtsi
+++ b/qcom/khaje.dtsi
@@ -1955,9 +1955,9 @@
 		qcom,msm-rng-iface-clk;
 		qcom,no-qrng-config;
 		interconnect-names = "data_path";
-		interconnects = <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_HWKM_CORE>;
+		interconnects = <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_PRNG>;
+		clocks = <&gcc GCC_PRNG_AHB_CLK>;
 		clock-names = "km_clk_src";
-		clocks = <&rpmcc RPM_SMD_HWKM_CLK>;
 	};
 
 	qcom_tzlog: tz-log@c125720 {