diff --git a/qcom/waipio-pm8010-spmi.dtsi b/qcom/waipio-pm8010-spmi.dtsi index 1cbfe0d4..9f89bdca 100644 --- a/qcom/waipio-pm8010-spmi.dtsi +++ b/qcom/waipio-pm8010-spmi.dtsi @@ -9,7 +9,7 @@ qcom,pmic-id-size = <10>; }; -&apps_rsc { +&apps_rsc_drv2 { rpmh-regulator-ldoi2 { compatible = "qcom,rpmh-vrm-regulator"; qcom,resource-name = "ldoi2"; diff --git a/qcom/waipio-regulators.dtsi b/qcom/waipio-regulators.dtsi index 01033f32..6d9d9b03 100644 --- a/qcom/waipio-regulators.dtsi +++ b/qcom/waipio-regulators.dtsi @@ -1,6 +1,6 @@ #include -&apps_rsc { +&apps_rsc_drv2 { rpmh-regulator-gfxlvl { compatible = "qcom,rpmh-arc-regulator"; qcom,resource-name = "gfx.lvl"; diff --git a/qcom/waipio.dtsi b/qcom/waipio.dtsi index 79bc5a4e..7ccf5b15 100644 --- a/qcom/waipio.dtsi +++ b/qcom/waipio.dtsi @@ -2522,35 +2522,39 @@ compatible = "qcom,rpmh-rsc"; reg = <0x17a00000 0x10000>, <0x17a10000 0x10000>, - <0x17a20000 0x10000>, - <0x17a30000 0x10000>; - reg-names = "drv-0", "drv-1", "drv-2", "drv-3"; + <0x17a20000 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + qcom,drv-count = <3>; interrupts = , , ; - /* No interrupt into GIC for DRV3 */ - qcom,tcs-offset = <0xd00>; - qcom,drv-id = <2>; - qcom,tcs-config = , - , - , - , /* PDC wakeup values will be written from TZ */ - ; power-domains = <&CLUSTER_PD>; - apps_bcm_voter: bcm_voter { - compatible = "qcom,bcm-voter"; - }; + apps_rsc_drv2: drv@2 { + qcom,drv-id = <2>; + qcom,tcs-offset = <0xd00>; + channel@0 { + qcom,tcs-config = , + , + , + , + ; + }; - clock_rpmh: qcom,rpmhclk { - compatible = "qcom,waipio-rpmh-clk"; - #clock-cells = <1>; - }; + apps_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + }; - dcvs_fp: qcom,dcvs-fp { - compatible = "qcom,dcvs-fp"; - qcom,ddr-bcm-name = "MC3"; - qcom,llcc-bcm-name = "SH5"; + clock_rpmh: qcom,rpmhclk { + compatible = "qcom,waipio-rpmh-clk"; + #clock-cells = <1>; + }; + + dcvs_fp: qcom,dcvs-fp { + compatible = "qcom,dcvs-fp"; + qcom,ddr-bcm-name = "MC3"; + qcom,llcc-bcm-name = "SH5"; + }; }; }; @@ -2559,19 +2563,25 @@ compatible = "qcom,rpmh-rsc"; reg = <0xaf20000 0x10000>; reg-names = "drv-0"; + qcom,drv-count = <1>; interrupts = ; clocks = <&clock_dispcc DISP_CC_MDSS_RSCC_AHB_CLK>; - qcom,tcs-offset = <0x1c00>; - qcom,drv-id = <0>; - qcom,tcs-config = , - , - , - , - ; - disp_bcm_voter: bcm_voter { - compatible = "qcom,bcm-voter"; - qcom,tcs-wait = ; + disp_rsc_drv0: drv@0 { + qcom,drv-id = <0>; + qcom,tcs-offset = <0x1c00>; + channel@0 { + qcom,tcs-config = , + , + , + , + ; + }; + + disp_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + qcom,tcs-wait = ; + }; }; };