From c72e0dd8ea0de72dc8bde1ab1b2123ee90150b63 Mon Sep 17 00:00:00 2001
From: Chetan C R <cchinnad@qti.qualcomm.com>
Date: Sun, 6 Mar 2022 19:45:54 +0530
Subject: [PATCH] dt-bindings: clock: Add clock controller bindings for Khaje

Add RPMCC, GCC, DISPCC, GPUCC, DEBUGCC clock controller
binding documentation for Khaje device.

Change-Id: I65860ddc3b5da22013a95c79c62ad322ec3c46db
---
 bindings/clock/qcom,debugcc.txt | 1 +
 bindings/clock/qcom,dispcc.txt  | 1 +
 bindings/clock/qcom,gcc.txt     | 1 +
 bindings/clock/qcom,gpucc.txt   | 3 ++-
 bindings/clock/qcom,rpmcc.txt   | 2 ++
 5 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/bindings/clock/qcom,debugcc.txt b/bindings/clock/qcom,debugcc.txt
index ae5d4185..2d89b16c 100644
--- a/bindings/clock/qcom,debugcc.txt
+++ b/bindings/clock/qcom,debugcc.txt
@@ -13,6 +13,7 @@ Required properties :
 			"qcom,kalama-debugcc"
 			"qcom,sm8150-debugcc"
 			"qcom,cinder-debugcc"
+			"qcom,khaje-debugcc"
 
 - qcom,gcc: phandle to the GCC device node.
 - qcom,videocc: phandle to the Video CC device node.
diff --git a/bindings/clock/qcom,dispcc.txt b/bindings/clock/qcom,dispcc.txt
index f33be020..85490354 100644
--- a/bindings/clock/qcom,dispcc.txt
+++ b/bindings/clock/qcom,dispcc.txt
@@ -14,6 +14,7 @@ Required properties :
 			"qcom,kalama-dispcc"
 			"qcom,sm8150-dispcc"
 			"qcom,sm8150-dispcc-v2"
+			"qcom,khaje-dispcc"
 
 - reg : shall contain base register location and length.
 - #clock-cells : from common clock binding, shall contain 1.
diff --git a/bindings/clock/qcom,gcc.txt b/bindings/clock/qcom,gcc.txt
index 0e132d93..f45688d0 100644
--- a/bindings/clock/qcom,gcc.txt
+++ b/bindings/clock/qcom,gcc.txt
@@ -35,6 +35,7 @@ Required properties :
 			"qcom,diwali-gcc"
 			"qcom,kalama-gcc"
 			"qcom,cinder-gcc"
+			"qcom,khaje-gcc"
 
 - reg : shall contain base register location and length
 - vdd_cx-supply: The vdd_cx logic rail supply.
diff --git a/bindings/clock/qcom,gpucc.txt b/bindings/clock/qcom,gpucc.txt
index 8d69b61e..f87e326f 100644
--- a/bindings/clock/qcom,gpucc.txt
+++ b/bindings/clock/qcom,gpucc.txt
@@ -12,7 +12,8 @@ Required properties :
 		"qcom,kalama-gpucc"
 		"qcom,sm8150-gpucc",
 		"qcom,sa8155-gpucc",
-		"qcom,scshrike-gpucc".
+		"qcom,scshrike-gpucc",
+		"qcom,khaje-gpucc".
 
 - reg: shall contain base register offset and size.
 - reg-names: names of registers listed in the same order as in the reg property.
diff --git a/bindings/clock/qcom,rpmcc.txt b/bindings/clock/qcom,rpmcc.txt
index 6cf5a7ec..217e48e6 100644
--- a/bindings/clock/qcom,rpmcc.txt
+++ b/bindings/clock/qcom,rpmcc.txt
@@ -25,6 +25,8 @@ Required properties :
 			"qcom,rpmcc-msm8998", "qcom,rpmcc"
 			"qcom,rpmcc-qcs404", "qcom,rpmcc"
 			"qcom,rpmcc-sdm660", "qcom,rpmcc"
+			"qcom,rpmcc-holi", "qcom,rpmcc"
+			"qcom,rpmcc-khaje", "qcom,rpmcc"
 
 - #clock-cells : shall contain 1