From cdfed5d819f441c4b5beea6d2f0f59333240f4de Mon Sep 17 00:00:00 2001 From: Yao Zhao Date: Wed, 28 Sep 2022 07:12:33 +0530 Subject: [PATCH] ARM: dts: msm: Add initial device tree for kona iot target Add initial devicetree support for kona iot target. Change-Id: I455bf739ec049e1e1ef01f55707a746fd54653d4 --- bindings/arm/msm/msm.txt | 1 + bindings/pinctrl/qcom,kona-pinctrl.txt | 197 + qcom/Makefile | 10 + qcom/kona-iot-v2.1-vc-overlay.dts | 10 + qcom/kona-iot-v2.1-vc.dtsi | 1 + qcom/kona-iot-v2.1.dts | 9 + qcom/kona-iot-v2.1.dtsi | 7 + qcom/kona-iot-v2.dts | 9 + qcom/kona-iot-v2.dtsi | 8 + qcom/kona-iot-vc.dtsi | 12 + qcom/kona-iot.dts | 9 + qcom/kona-iot.dtsi | 7 + qcom/kona-pinctrl.dtsi | 4542 ++++++++++++++++++++++++ qcom/kona-v2.1.dtsi | 8 + qcom/kona-v2.dtsi | 23 + qcom/kona.dtsi | 1108 ++++++ 16 files changed, 5961 insertions(+) create mode 100644 bindings/pinctrl/qcom,kona-pinctrl.txt create mode 100644 qcom/kona-iot-v2.1-vc-overlay.dts create mode 100644 qcom/kona-iot-v2.1-vc.dtsi create mode 100644 qcom/kona-iot-v2.1.dts create mode 100644 qcom/kona-iot-v2.1.dtsi create mode 100644 qcom/kona-iot-v2.dts create mode 100644 qcom/kona-iot-v2.dtsi create mode 100644 qcom/kona-iot-vc.dtsi create mode 100644 qcom/kona-iot.dts create mode 100644 qcom/kona-iot.dtsi create mode 100644 qcom/kona-pinctrl.dtsi create mode 100644 qcom/kona-v2.1.dtsi create mode 100644 qcom/kona-v2.dtsi create mode 100644 qcom/kona.dtsi diff --git a/bindings/arm/msm/msm.txt b/bindings/arm/msm/msm.txt index 6b7f1c2c..c8f05b54 100644 --- a/bindings/arm/msm/msm.txt +++ b/bindings/arm/msm/msm.txt @@ -247,6 +247,7 @@ compatible = "qcom,kona-rumi" compatible = "qcom,kona-mtp" compatible = "qcom,kona-cdp" compatible = "qcom,kona-qrd" +compatible = "qcom,kona-iot" compatible = "qcom,lahaina-rumi" compatible = "qcom,lahaina-atp" compatible = "qcom,lahaina-mtp" diff --git a/bindings/pinctrl/qcom,kona-pinctrl.txt b/bindings/pinctrl/qcom,kona-pinctrl.txt new file mode 100644 index 00000000..92520b8c --- /dev/null +++ b/bindings/pinctrl/qcom,kona-pinctrl.txt @@ -0,0 +1,197 @@ +Qualcomm Technologies, Inc. KONA TLMM block + +This binding describes the Top Level Mode Multiplexer block found in the +KONA platform. + +- compatible: + Usage: required + Value type: + Definition: must be "qcom,kona-pinctrl" + +- reg: + Usage: required + Value type: + Definition: the base address and size of the TLMM register space. + +- interrupts: + Usage: required + Value type: + Definition: should specify the TLMM summary IRQ. + +- interrupt-controller: + Usage: required + Value type: + Definition: identifies this node as an interrupt controller + +- #interrupt-cells: + Usage: required + Value type: + Definition: must be 2. Specifying the pin number and flags, as defined + in + +- gpio-controller: + Usage: required + Value type: + Definition: identifies this node as a gpio controller + +- #gpio-cells: + Usage: required + Value type: + Definition: must be 2. Specifying the pin number and flags, as defined + in + +- wakeup-parent: + Usage: optional + Value type: + Definition: A phandle to the wakeup interrupt controller for the SoC. + +- qcom,gpios-reserved: + Usage: optional + Value type: + Definition: A list of reserved gpios that should not be used by the kernel drivers. + +Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for +a general description of GPIO and interrupt bindings. + +Please refer to pinctrl-bindings.txt in this directory for details of the +common pinctrl bindings used by client devices, including the meaning of the +phrase "pin configuration node". + +The pin configuration nodes act as a container for an arbitrary number of +subnodes. Each of these subnodes represents some desired configuration for a +pin, a group, or a list of pins or groups. This configuration can include the +mux function to select on those pin(s)/group(s), and various pin configuration +parameters, such as pull-up, drive strength, etc. + + +PIN CONFIGURATION NODES: + +The name of each subnode is not important; all subnodes should be enumerated +and processed purely based on their content. + +Each subnode only affects those parameters that are explicitly listed. In +other words, a subnode that lists a mux function but no pin configuration +parameters implies no information about any pin configuration parameters. +Similarly, a pin subnode that describes a pullup parameter implies no +information about e.g. the mux function. + + +The following generic properties as defined in pinctrl-bindings.txt are valid +to specify in a pin configuration subnode: + +- pins: + Usage: required + Value type: + Definition: List of gpio pins affected by the properties specified in + this subnode. + + Valid pins are: + gpio0-gpio149 + Supports mux, bias and drive-strength + + sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd, + sdc2_data sdc1_rclk + Supports bias and drive-strength + +- function: + Usage: required + Value type: + Definition: Specify the alternative function to be configured for the + specified pins. Functions are only valid for gpio pins. + Valid values are: + + blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens, + bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8, + qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b, + dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10, + blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12, + mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11, + atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char, + cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b, + pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c, + qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4, + qdss_stm2, atest_usb22, atest_char2, qdss_stm1, dac_calib5, + atest_usb21, atest_char1, dbg_out, qdss_stm0, dac_calib6, + atest_usb20, atest_char0, dac_calib10, qdss_stm10, + qdss_cti_trig_in_a, cci_timer4, blsp_spi6, blsp_uart6, blsp_uim6, + blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11, + qdss_stm8, cci_timer0, qdss_stm13, dac_calib7, cci_timer1, + qdss_stm12, dac_calib8, cci_timer2, blsp1_spi, qdss_stm11, + dac_calib9, cci_timer3, cci_async, dac_calib12, blsp_i2c6, + qdss_tracectl_a, dac_calib13, qdss_traceclk_a, dac_calib14, + dac_calib15, hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem, + dac_calib17, hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto, + dac_calib19, hdmi_hot, dac_calib20, dac_calib21, pci_e0, + dac_calib22, dac_calib23, dac_calib24, tsif1_sync, dac_calib25, + sd_write, tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2, + qdss_cti, blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3, + uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9, + blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7, + qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11, blsp_uart11, + blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp_i2c11, cri_trng0, + cri_trng1, cri_trng, qdss_stm18, pri_mi2s, qdss_stm17, blsp_spi4, + blsp_uart4, blsp_uim4, qdss_stm16, qdss_stm15, blsp_i2c4, + qdss_stm14, dac_calib26, spkr_i2s, audio_ref, lpass_slimbus, + isense_dbg, tsense_pwm1, tsense_pwm2, btfm_slimbus, ter_mi2s, + qdss_stm22, qdss_stm21, qdss_stm20, qdss_stm19, gcc_gp1_clk_b, + sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b, + gcc_gp3_clk_b, blsp_i2c5, blsp_spi12, blsp_uart12, blsp_uim12, + qdss_stm25, qdss_stm31, blsp_i2c12, qdss_stm30, qdss_stm29, + tsif1_clk, qdss_stm28, tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27, + qdss_traceclk_b, tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk, + sdc4_clk, qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b, + sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b, + ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b, blsp11_uart_rx_b, + blsp11_i2c_sda_b, prng_rosc, blsp11_i2c_scl_b, uim2, uim1, uim_batt, + pci_e2, pa_indicator, adsp_ext, ddr_bist, qdss_tracedata_11, + qdss_tracedata_12, modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, + qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3, + gpio + +- bias-disable: + Usage: optional + Value type: + Definition: The specified pins should be configured as no pull. + +- bias-pull-down: + Usage: optional + Value type: + Definition: The specified pins should be configured as pull down. + +- bias-pull-up: + Usage: optional + Value type: + Definition: The specified pins should be configured as pull up. + +- output-high: + Usage: optional + Value type: + Definition: The specified pins are configured in output mode, driven + high. + Not valid for sdc pins. + +- output-low: + Usage: optional + Value type: + Definition: The specified pins are configured in output mode, driven + low. + Not valid for sdc pins. + +- drive-strength: + Usage: optional + Value type: + Definition: Selects the drive strength for the specified pins, in mA. + Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16 + +Example: + + tlmm: pinctrl@03000000 { + compatible = "qcom,kona-pinctrl"; + reg = <0x03000000 0xdc2000>; + interrupts = <0 208 0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + wakeup-parent = <&pdc>; + }; diff --git a/qcom/Makefile b/qcom/Makefile index e8d09d92..5e38c8a2 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -122,6 +122,16 @@ bengal-dtb-$(CONFIG_ARCH_KHAJE) += \ bengal-overlays-dtb-$(CONFIG_ARCH_KHAJE) += $(KHAJE_BOARDS) $(KHAJE_BASE_DTB) dtb-y += $(bengal-dtb-y) +KONA_BASE_DTB += kona-iot.dtb kona-iot-v2.dtb kona-iot-v2.1.dtb + +KONA_BOARDS += \ + kona-iot-v2.1-vc-overlay.dtbo + +kona-dtb-$(CONFIG_ARCH_KONA) += \ + $(call add-overlays, $(KONA_BOARDS) ,$(KONA_BASE_DTB)) +kona-overlays-dtb-$(CONFIG_ARCH_KONA) += $(KONA_BOARDS) $(KONA_BASE_DTB) +dtb-y += $(kona-dtb-y) + MONACO_BASE_DTB += monaco.dtb monacop.dtb MONACO_BOARDS += \ diff --git a/qcom/kona-iot-v2.1-vc-overlay.dts b/qcom/kona-iot-v2.1-vc-overlay.dts new file mode 100644 index 00000000..8e41be32 --- /dev/null +++ b/qcom/kona-iot-v2.1-vc-overlay.dts @@ -0,0 +1,10 @@ +/dts-v1/; +/plugin/; + +#include "kona-iot-v2.1-vc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona-iot VC"; + compatible = "qcom,kona-iot"; + qcom,board-id = <0x010020 0x07>; +}; diff --git a/qcom/kona-iot-v2.1-vc.dtsi b/qcom/kona-iot-v2.1-vc.dtsi new file mode 100644 index 00000000..5c17996d --- /dev/null +++ b/qcom/kona-iot-v2.1-vc.dtsi @@ -0,0 +1 @@ +#include "kona-iot-vc.dtsi" diff --git a/qcom/kona-iot-v2.1.dts b/qcom/kona-iot-v2.1.dts new file mode 100644 index 00000000..435cd698 --- /dev/null +++ b/qcom/kona-iot-v2.1.dts @@ -0,0 +1,9 @@ +/dts-v1/; + +#include "kona-iot-v2.1.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona-iot v2.1 SoC"; + compatible = "qcom,kona-iot"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/kona-iot-v2.1.dtsi b/qcom/kona-iot-v2.1.dtsi new file mode 100644 index 00000000..4ce3f21c --- /dev/null +++ b/qcom/kona-iot-v2.1.dtsi @@ -0,0 +1,7 @@ + #include "kona-v2.1.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona-iot v2.1"; + compatible = "qcom,kona-iot"; + qcom,msm-id = <481 0x20001>; +}; diff --git a/qcom/kona-iot-v2.dts b/qcom/kona-iot-v2.dts new file mode 100644 index 00000000..c7606918 --- /dev/null +++ b/qcom/kona-iot-v2.dts @@ -0,0 +1,9 @@ +/dts-v1/; + +#include "kona-iot-v2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona-iot v2 SoC"; + compatible = "qcom,kona-iot"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/kona-iot-v2.dtsi b/qcom/kona-iot-v2.dtsi new file mode 100644 index 00000000..db10880e --- /dev/null +++ b/qcom/kona-iot-v2.dtsi @@ -0,0 +1,8 @@ + #include "kona-v2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona-iot v2"; + compatible = "qcom,kona-iot"; + qcom,msm-id = <481 0x20000>; +}; + diff --git a/qcom/kona-iot-vc.dtsi b/qcom/kona-iot-vc.dtsi new file mode 100644 index 00000000..fa9050d0 --- /dev/null +++ b/qcom/kona-iot-vc.dtsi @@ -0,0 +1,12 @@ +#include + +&tlmm { + key_factory_reset { + key_factory_reset_default: key_factory_reset_default { + pins = "gpio22"; + function = "normal"; + input-enable; + bias-pull-up; + }; + }; +}; diff --git a/qcom/kona-iot.dts b/qcom/kona-iot.dts new file mode 100644 index 00000000..1fb20243 --- /dev/null +++ b/qcom/kona-iot.dts @@ -0,0 +1,9 @@ +/dts-v1/; + +#include "kona-iot.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona-iot"; + compatible = "qcom,kona-iot"; + qcom,board-id = <0 0>; +}; diff --git a/qcom/kona-iot.dtsi b/qcom/kona-iot.dtsi new file mode 100644 index 00000000..62a4c346 --- /dev/null +++ b/qcom/kona-iot.dtsi @@ -0,0 +1,7 @@ +#include "kona.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kona-iot"; + compatible = "qcom,kona-iot"; + qcom,msm-id = <481 0x0>; +}; diff --git a/qcom/kona-pinctrl.dtsi b/qcom/kona-pinctrl.dtsi new file mode 100644 index 00000000..d9a4e596 --- /dev/null +++ b/qcom/kona-pinctrl.dtsi @@ -0,0 +1,4542 @@ +&soc { + tlmm: pinctrl@f000000 { + compatible = "qcom,kona-pinctrl"; + reg = <0x0F000000 0x1000000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + wakeup-parent = <&pdc>; + qcom,gpios-reserved = <28 29 30 31 40 41 42 43>; + irqdomain-map = <0 0 &pdc 79 0>, + <1 0 &pdc 84 0>, + <2 0 &pdc 80 0>, + <3 0 &pdc 82 0>, + <4 0 &pdc 107 0>, + <7 0 &pdc 43 0>, + <11 0 &pdc 42 0>, + <14 0 &pdc 44 0>, + <15 0 &pdc 52 0>, + <19 0 &pdc 67 0>, + <23 0 &pdc 68 0>, + <24 0 &pdc 105 0>, + <27 0 &pdc 92 0>, + <28 0 &pdc 106 0>, + <31 0 &pdc 69 0>, + <35 0 &pdc 70 0>, + <39 0 &pdc 73 0>, + <40 0 &pdc 108 0>, + <43 0 &pdc 71 0>, + <45 0 &pdc 72 0>, + <47 0 &pdc 83 0>, + <51 0 &pdc 74 0>, + <55 0 &pdc 77 0>, + <59 0 &pdc 78 0>, + <63 0 &pdc 75 0>, + <64 0 &pdc 81 0>, + <65 0 &pdc 87 0>, + <66 0 &pdc 88 0>, + <67 0 &pdc 89 0>, + <68 0 &pdc 54 0>, + <70 0 &pdc 85 0>, + <77 0 &pdc 46 0>, + <80 0 &pdc 90 0>, + <81 0 &pdc 91 0>, + <83 0 &pdc 97 0>, + <84 0 &pdc 98 0>, + <86 0 &pdc 99 0>, + <88 0 &pdc 101 0>, + <89 0 &pdc 102 0>, + <92 0 &pdc 103 0>, + <93 0 &pdc 104 0>, + <100 0 &pdc 53 0>, + <103 0 &pdc 47 0>, + <104 0 &pdc 48 0>, + <108 0 &pdc 49 0>, + <109 0 &pdc 94 0>, + <110 0 &pdc 95 0>, + <111 0 &pdc 96 0>, + <112 0 &pdc 55 0>, + <113 0 &pdc 56 0>, + <118 0 &pdc 50 0>, + <121 0 &pdc 51 0>, + <122 0 &pdc 57 0>, + <123 0 &pdc 58 0>, + <124 0 &pdc 45 0>, + <126 0 &pdc 59 0>, + <128 0 &pdc 76 0>, + <129 0 &pdc 86 0>, + <132 0 &pdc 93 0>, + <133 0 &pdc 65 0>, + <134 0 &pdc 66 0>, + <136 0 &pdc 62 0>, + <137 0 &pdc 63 0>, + <138 0 &pdc 64 0>, + <142 0 &pdc 60 0>, + <143 0 &pdc 61 0>, + <147 0 &pdc 109 0>, /* bi_mx_lpass_1_aoss_mx */ + <150 0 &pdc 110 0>, + <157 0 &pdc 111 0>, + <158 0 &pdc 112 0>, + <160 0 &pdc 113 0>, + <162 0 &pdc 114 0>, + <164 0 &pdc 115 0>, + <166 0 &pdc 116 0>, + <167 0 &pdc 117 0>, + <175 0 &pdc 118 0>, + <177 0 &pdc 119 0>, + <179 0 &pdc 120 0>; + irqdomain-map-mask = <0xff 0>; + irqdomain-map-pass-thru = <0 0xff>; + + trigout_a: trigout_a { + mux { + pins = "gpio2"; + function = "qdss_cti"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se2_2uart_pins: qupv3_se2_2uart_pins { + qupv3_se2_2uart_active: qupv3_se2_2uart_active { + mux { + pins = "gpio117", "gpio118"; + function = "qup2"; + }; + + config { + pins = "gpio117", "gpio118"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se2_2uart_sleep: qupv3_se2_2uart_sleep { + mux { + pins = "gpio117", "gpio118"; + function = "gpio"; + }; + + config { + pins = "gpio117", "gpio118"; + drive-strength = <2>; + bias-pull-down; + }; + }; + }; + + qupv3_se6_4uart_pins: qupv3_se6_4uart_pins { + qupv3_se6_default_cts: + qupv3_se6_default_cts { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se6_default_rtsrx: + qupv3_se6_default_rtsrx { + mux { + pins = "gpio17", "gpio19"; + function = "gpio"; + }; + + config { + pins = "gpio17", "gpio19"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + qupv3_se6_default_tx: + qupv3_se6_default_tx { + mux { + pins = "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + qupv3_se6_ctsrx: qupv3_se6_ctsrx { + mux { + pins = "gpio16", "gpio19"; + function = "qup6"; + }; + + config { + pins = "gpio16", "gpio19"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se6_rts: qupv3_se6_rts { + mux { + pins = "gpio17"; + function = "qup6"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + qupv3_se6_tx: qupv3_se6_tx { + mux { + pins = "gpio18"; + function = "qup6"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + qupv3_se12_2uart_pins: qupv3_se12_2uart_pins { + qupv3_se12_2uart_active: qupv3_se12_2uart_active { + mux { + pins = "gpio34", "gpio35"; + function = "qup12"; + }; + + config { + pins = "gpio34", "gpio35"; + drive-strength = <2>; + }; + }; + + qupv3_se12_2uart_sleep: qupv3_se12_2uart_sleep { + mux { + pins = "gpio34", "gpio35"; + drive-strength = <2>; + bias-pull-down; + }; + + config { + pins = "gpio34", "gpio35"; + drive-strength = <2>; + bias-pull-down; + }; + }; + }; + + qupv3_se17_4uart_pins: qupv3_se17_4uart_pins { + qupv3_se17_ctsrx: qupv3_se17_ctsrx { + mux { + pins = "gpio52", "gpio55"; + function = "qup17"; + }; + + config { + pins = "gpio52", "gpio55"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + qupv3_se17_rts: qupv3_se17_rts { + mux { + pins = "gpio53"; + function = "qup17"; + }; + + config { + pins = "gpio53"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + qupv3_se17_tx: qupv3_se17_tx { + mux { + pins = "gpio54"; + function = "qup17"; + }; + + config { + pins = "gpio54"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + qupv3_se18_2uart_pins: qupv3_se18_2uart_pins { + qupv3_se18_rx: qupv3_se18_rx { + mux { + pins = "gpio59"; + function = "qup18"; + }; + + config { + pins = "gpio59"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + qupv3_se18_tx: qupv3_se18_tx { + mux { + pins = "gpio58"; + function = "qup18"; + }; + + config { + pins = "gpio58"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + pmx_ts_active { + ts_active: ts_active { + mux { + pins = "gpio38", "gpio39"; + function = "gpio"; + }; + + config { + pins = "gpio38", "gpio39"; + drive-strength = <8>; + bias-pull-up; + }; + }; + }; + + pmx_ts_int_suspend { + ts_int_suspend: ts_int_suspend { + mux { + pins = "gpio39"; + function = "gpio"; + }; + + config { + pins = "gpio39"; + drive-strength = <2>; + bias-pull-down; + }; + }; + }; + + pmx_ts_reset_suspend { + ts_reset_suspend: ts_reset_suspend { + mux { + pins = "gpio38"; + function = "gpio"; + }; + + config { + pins = "gpio38"; + drive-strength = <2>; + bias-pull-down; + }; + }; + }; + + pmx_ts_release { + pmx_ts_release: pmx_ts_release { + mux { + pins = "gpio38", "gpio39"; + function = "gpio"; + }; + + config { + pins = "gpio38", "gpio39"; + drive-strength = <2>; + bias-disable; + }; + }; + }; + + ufs_dev_reset_assert: ufs_dev_reset_assert { + config { + pins = "ufs_reset"; + bias-pull-down; /* default: pull down */ + /* + * UFS_RESET driver strengths are having + * different values/steps compared to typical + * GPIO drive strengths. + * + * Following table clarifies: + * + * HDRV value | UFS_RESET | Typical GPIO + * (dec) | (mA) | (mA) + * 0 | 0.8 | 2 + * 1 | 1.55 | 4 + * 2 | 2.35 | 6 + * 3 | 3.1 | 8 + * 4 | 3.9 | 10 + * 5 | 4.65 | 12 + * 6 | 5.4 | 14 + * 7 | 6.15 | 16 + * + * POR value for UFS_RESET HDRV is 3 which means + * 3.1mA and we want to use that. Hence just + * specify 8mA to "drive-strength" binding and + * that should result into writing 3 to HDRV + * field. + */ + drive-strength = <8>; /* default: 3.1 mA */ + output-low; /* active low reset */ + }; + }; + + ufs_dev_reset_deassert: ufs_dev_reset_deassert { + config { + pins = "ufs_reset"; + bias-pull-down; /* default: pull down */ + /* + * default: 3.1 mA + * check comments under ufs_dev_reset_assert + */ + drive-strength = <8>; + output-high; /* active low reset */ + }; + }; + + sdc2_on: sdc2_on { + clk { + pins = "sdc2_clk"; + bias-disable; /* NO pull */ + drive-strength = <16>; /* 16 MA */ + }; + + cmd { + pins = "sdc2_cmd"; + bias-pull-up; /* pull up */ + drive-strength = <16>; /* 16 MA */ + }; + + data { + pins = "sdc2_data"; + bias-pull-up; /* pull up */ + drive-strength = <16>; /* 16 MA */ + }; + + sd-cd { + pins = "gpio77"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + sdc2_off: sdc2_off { + clk { + pins = "sdc2_clk"; + bias-disable; /* NO pull */ + drive-strength = <2>; /* 2 MA */ + }; + + cmd { + pins = "sdc2_cmd"; + bias-pull-up; /* pull up */ + drive-strength = <2>; /* 2 MA */ + }; + + data { + pins = "sdc2_data"; + bias-pull-up; /* pull up */ + drive-strength = <2>; /* 2 MA */ + }; + + sd_cd { + pins = "gpio77"; + drive-strength = <2>; + bias-disable; + }; + }; + + /* add pins for DisplayPort */ + sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active { + mux { + pins = "gpio65"; + function = "gpio"; + }; + + config { + pins = "gpio65"; + bias-disable; + drive-strength = <16>; + }; + }; + + sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend { + mux { + pins = "gpio65"; + function = "gpio"; + }; + + config { + pins = "gpio65"; + bias-pull-down; + drive-strength = <2>; + }; + }; + + ap2mdm { + ap2mdm_active: ap2mdm_active { + mux { + /* ap2mdm-status + * ap2mdm-errfatal + * ap2mdm-vddmin + */ + pins = "gpio56", "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio56", "gpio57"; + drive-strength = <16>; + bias-disable; + }; + }; + + ap2mdm_sleep: ap2mdm_sleep { + mux { + /* ap2mdm-status + * ap2mdm-errfatal + * ap2mdm-vddmin + */ + pins = "gpio56", "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio56", "gpio57"; + drive-strength = <8>; + bias-disable; + }; + + }; + }; + + mdm2ap { + mdm2ap_active: mdm2ap_active { + mux { + /* mdm2ap-status + * mdm2ap-errfatal + * mdm2ap-vddmin + */ + pins = "gpio1", "gpio3"; + function = "gpio"; + }; + + config { + pins = "gpio1", "gpio3"; + drive-strength = <8>; + bias-disable; + }; + }; + + mdm2ap_sleep: mdm2ap_sleep { + mux { + /* mdm2ap-status + * mdm2ap-errfatal + * mdm2ap-vddmin + */ + pins = "gpio1", "gpio3"; + function = "gpio"; + }; + + config { + pins = "gpio1", "gpio3"; + drive-strength = <8>; + bias-disable; + }; + }; + }; + + pcie0 { + pcie0_perst_default: pcie0_perst_default { + mux { + pins = "gpio79"; + function = "gpio"; + }; + + config { + pins = "gpio79"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie0_clkreq_default: pcie0_clkreq_default { + mux { + pins = "gpio80"; + function = "pci_e0"; + }; + + config { + pins = "gpio80"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie0_wake_default: pcie0_wake_default { + mux { + pins = "gpio81"; + function = "gpio"; + }; + + config { + pins = "gpio81"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie0_clkreq_sleep: pcie0_clkreq_sleep { + mux { + pins = "gpio80"; + function = "gpio"; + }; + + config { + pins = "gpio80"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + pcie1 { + pcie1_perst_default: pcie1_perst_default { + mux { + pins = "gpio82"; + function = "gpio"; + }; + + config { + pins = "gpio82"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie1_clkreq_default: pcie1_clkreq_default { + mux { + pins = "gpio83"; + function = "pci_e1"; + }; + + config { + pins = "gpio83"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie1_wake_default: pcie1_wake_default { + mux { + pins = "gpio84"; + function = "gpio"; + }; + + config { + pins = "gpio84"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + pcie2 { + pcie2_perst_default: pcie2_perst_default { + mux { + pins = "gpio85"; + function = "gpio"; + }; + + config { + pins = "gpio85"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie2_clkreq_default: pcie2_clkreq_default { + mux { + pins = "gpio86"; + function = "pci_e2"; + }; + + config { + pins = "gpio86"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie2_wake_default: pcie2_wake_default { + mux { + pins = "gpio87"; + function = "gpio"; + }; + + config { + pins = "gpio87"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + cnss_pins { + cnss_wlan_en_active: cnss_wlan_en_active { + mux { + pins = "gpio20"; + function = "gpio"; + }; + + config { + pins = "gpio20"; + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + + cnss_wlan_en_sleep: cnss_wlan_en_sleep { + mux { + pins = "gpio20"; + function = "gpio"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + }; + + pmx_sde: pmx_sde { + sde_dsi_active: sde_dsi_active { + mux { + pins = "gpio75", "gpio60"; + function = "gpio"; + }; + + config { + pins = "gpio75", "gpio60"; + drive-strength = <8>; /* 8 mA */ + bias-disable = <0>; /* no pull */ + }; + }; + + sde_dsi_suspend: sde_dsi_suspend { + mux { + pins = "gpio75", "gpio60"; + function = "gpio"; + }; + + config { + pins = "gpio75", "gpio60"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + + sde_dsi1_active: sde_dsi1_active { + mux { + pins = "gpio128"; + function = "gpio"; + }; + + config { + pins = "gpio128"; + drive-strength = <8>; /* 8 mA */ + bias-disable = <0>; /* no pull */ + }; + }; + + sde_dsi1_suspend: sde_dsi1_suspend { + mux { + pins = "gpio128"; + function = "gpio"; + }; + + config { + pins = "gpio128"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + }; + + pmx_sde_te { + sde_te_active: sde_te_active { + mux { + pins = "gpio66"; + function = "mdp_vsync"; + }; + + config { + pins = "gpio66"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + + sde_te_suspend: sde_te_suspend { + mux { + pins = "gpio66"; + function = "mdp_vsync"; + }; + + config { + pins = "gpio66"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + + sde_te1_active: sde_te1_active { + mux { + pins = "gpio67"; + function = "mdp_vsync"; + }; + + config { + pins = "gpio67"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + + sde_te1_suspend: sde_te1_suspend { + mux { + pins = "gpio67"; + function = "mdp_vsync"; + }; + + config { + pins = "gpio67"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + }; + + pri_aux_pcm_clk { + pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep { + mux { + pins = "gpio138"; + function = "gpio"; + }; + + config { + pins = "gpio138"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_aux_pcm_clk_active: pri_aux_pcm_clk_active { + mux { + pins = "gpio138"; + function = "mi2s0_sck"; + }; + + config { + pins = "gpio138"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + pri_aux_pcm_sync { + pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep { + mux { + pins = "gpio141"; + function = "gpio"; + }; + + config { + pins = "gpio141"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_aux_pcm_sync_active: pri_aux_pcm_sync_active { + mux { + pins = "gpio141"; + function = "mi2s0_ws"; + }; + + config { + pins = "gpio141"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + pri_aux_pcm_din { + pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep { + mux { + pins = "gpio139"; + function = "gpio"; + }; + + config { + pins = "gpio139"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_aux_pcm_din_active: pri_aux_pcm_din_active { + mux { + pins = "gpio139"; + function = "mi2s0_data0"; + }; + + config { + pins = "gpio139"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + pri_aux_pcm_dout { + pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep { + mux { + pins = "gpio140"; + function = "gpio"; + }; + + config { + pins = "gpio140"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_aux_pcm_dout_active: pri_aux_pcm_dout_active { + mux { + pins = "gpio140"; + function = "mi2s0_data1"; + }; + + config { + pins = "gpio140"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_aux_pcm { + sec_aux_pcm_clk_sleep: sec_aux_pcm_clk_sleep { + mux { + pins = "gpio142"; + function = "gpio"; + }; + + config { + pins = "gpio142"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_aux_pcm_clk_active: sec_aux_pcm_clk_active { + mux { + pins = "gpio142"; + function = "mi2s1_sck"; + }; + + config { + pins = "gpio142"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + + sec_aux_pcm_ws_sleep: sec_aux_pcm_ws_sleep { + mux { + pins = "gpio145"; + function = "gpio"; + }; + + config { + pins = "gpio145"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_aux_pcm_ws_active: sec_aux_pcm_ws_active { + mux { + pins = "gpio145"; + function = "mi2s1_ws"; + }; + + config { + pins = "gpio145"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_aux_pcm_din { + sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep { + mux { + pins = "gpio143"; + function = "gpio"; + }; + + config { + pins = "gpio143"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_aux_pcm_din_active: sec_aux_pcm_din_active { + mux { + pins = "gpio143"; + function = "mi2s1_data0"; + }; + + config { + pins = "gpio143"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_aux_pcm_dout { + sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep { + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_aux_pcm_dout_active: sec_aux_pcm_dout_active { + mux { + pins = "gpio144"; + function = "mi2s1_data1"; + }; + + config { + pins = "gpio144"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tert_aux_pcm { + tert_aux_pcm_clk_sleep: tert_aux_pcm_clk_sleep { + mux { + pins = "gpio133"; + function = "gpio"; + }; + + config { + pins = "gpio133"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_aux_pcm_clk_active: tert_aux_pcm_clk_active { + mux { + pins = "gpio133"; + function = "mi2s2_sck"; + }; + + config { + pins = "gpio133"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + + tert_aux_pcm_ws_sleep: tert_aux_pcm_ws_sleep { + mux { + pins = "gpio135"; + function = "gpio"; + }; + + config { + pins = "gpio135"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_aux_pcm_ws_active: tert_aux_pcm_ws_active { + mux { + pins = "gpio135"; + function = "mi2s2_ws"; + }; + + config { + pins = "gpio135"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + tert_aux_pcm_din { + tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep { + mux { + pins = "gpio134"; + function = "gpio"; + }; + + config { + pins = "gpio134"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_aux_pcm_din_active: tert_aux_pcm_din_active { + mux { + pins = "gpio134"; + function = "mi2s2_data0"; + }; + + config { + pins = "gpio134"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tert_aux_pcm_dout { + tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep { + mux { + pins = "gpio137"; + function = "gpio"; + }; + + config { + pins = "gpio137"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_aux_pcm_dout_active: tert_aux_pcm_dout_active { + mux { + pins = "gpio137"; + function = "mi2s2_data1"; + }; + + config { + pins = "gpio137"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + pri_tdm_clk { + pri_tdm_clk_sleep: pri_tdm_clk_sleep { + mux { + pins = "gpio138"; + function = "gpio"; + }; + + config { + pins = "gpio138"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_tdm_clk_active: pri_tdm_clk_active { + mux { + pins = "gpio138"; + function = "mi2s0_sck"; + }; + + config { + pins = "gpio138"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + pri_tdm_sync { + pri_tdm_sync_sleep: pri_tdm_sync_sleep { + mux { + pins = "gpio141"; + function = "gpio"; + }; + + config { + pins = "gpio141"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_tdm_sync_active: pri_tdm_sync_active { + mux { + pins = "gpio141"; + function = "mi2s0_ws"; + }; + + config { + pins = "gpio141"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + pri_tdm_din { + pri_tdm_din_sleep: pri_tdm_din_sleep { + mux { + pins = "gpio139"; + function = "gpio"; + }; + + config { + pins = "gpio139"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_tdm_din_active: pri_tdm_din_active { + mux { + pins = "gpio139"; + function = "mi2s0_data0"; + }; + + config { + pins = "gpio139"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + pri_tdm_dout { + pri_tdm_dout_sleep: pri_tdm_dout_sleep { + mux { + pins = "gpio140"; + function = "gpio"; + }; + + config { + pins = "gpio140"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_tdm_dout_active: pri_tdm_dout_active { + mux { + pins = "gpio140"; + function = "mi2s0_data1"; + }; + + config { + pins = "gpio140"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_tdm { + sec_tdm_sck_sleep: sec_tdm_sck_sleep { + mux { + pins = "gpio142"; + function = "gpio"; + }; + + config { + pins = "gpio142"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_tdm_sck_active: sec_tdm_sck_active { + mux { + pins = "gpio142"; + function = "mi2s1_sck"; + }; + + config { + pins = "gpio142"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + + sec_tdm_ws_sleep: sec_tdm_ws_sleep { + mux { + pins = "gpio145"; + function = "gpio"; + }; + + config { + pins = "gpio145"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_tdm_ws_active: sec_tdm_ws_active { + mux { + pins = "gpio145"; + function = "mi2s1_ws"; + }; + + config { + pins = "gpio145"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_tdm_din { + sec_tdm_din_sleep: sec_tdm_din_sleep { + mux { + pins = "gpio143"; + function = "gpio"; + }; + + config { + pins = "gpio143"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_tdm_din_active: sec_tdm_din_active { + mux { + pins = "gpio143"; + function = "mi2s1_data0"; + }; + + config { + pins = "gpio143"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_tdm_dout { + sec_tdm_dout_sleep: sec_tdm_dout_sleep { + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_tdm_dout_active: sec_tdm_dout_active { + mux { + pins = "gpio144"; + function = "mi2s1_data1"; + }; + + config { + pins = "gpio144"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tert_tdm { + tert_tdm_clk_sleep: tert_tdm_clk_sleep { + mux { + pins = "gpio133"; + function = "gpio"; + }; + + config { + pins = "gpio133"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_tdm_clk_active: tert_tdm_clk_active { + mux { + pins = "gpio133"; + function = "mi2s2_sck"; + }; + + config { + pins = "gpio133"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + + tert_tdm_ws_sleep: tert_tdm_ws_sleep { + mux { + pins = "gpio135"; + function = "gpio"; + }; + + config { + pins = "gpio135"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_tdm_ws_active: tert_tdm_ws_active { + mux { + pins = "gpio135"; + function = "mi2s2_ws"; + }; + + config { + pins = "gpio135"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + tert_tdm_din { + tert_tdm_din_sleep: tert_tdm_din_sleep { + mux { + pins = "gpio134"; + function = "gpio"; + }; + + config { + pins = "gpio134"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_tdm_din_active: tert_tdm_din_active { + mux { + pins = "gpio134"; + function = "mi2s2_data0"; + }; + + config { + pins = "gpio134"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tert_tdm_dout { + tert_tdm_dout_sleep: tert_tdm_dout_sleep { + mux { + pins = "gpio137"; + function = "gpio"; + }; + + config { + pins = "gpio137"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_tdm_dout_active: tert_tdm_dout_active { + mux { + pins = "gpio137"; + function = "mi2s2_data1"; + }; + + config { + pins = "gpio137"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + pri_mi2s_mclk { + pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep { + mux { + pins = "gpio136"; + function = "gpio"; + }; + + config { + pins = "gpio136"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_mi2s_mclk_active: pri_mi2s_mclk_active { + mux { + pins = "gpio136"; + function = "pri_mi2s"; + }; + + config { + pins = "gpio136"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + pri_mi2s_sck { + pri_mi2s_sck_sleep: pri_mi2s_sck_sleep { + mux { + pins = "gpio138"; + function = "gpio"; + }; + + config { + pins = "gpio138"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_mi2s_sck_active: pri_mi2s_sck_active { + mux { + pins = "gpio138"; + function = "mi2s0_sck"; + }; + + config { + pins = "gpio138"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + pri_mi2s_ws { + pri_mi2s_ws_sleep: pri_mi2s_ws_sleep { + mux { + pins = "gpio141"; + function = "gpio"; + }; + + config { + pins = "gpio141"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_mi2s_ws_active: pri_mi2s_ws_active { + mux { + pins = "gpio141"; + function = "mi2s0_ws"; + }; + + config { + pins = "gpio141"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + pri_mi2s_sd0 { + pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep { + mux { + pins = "gpio139"; + function = "gpio"; + }; + + config { + pins = "gpio139"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_mi2s_sd0_active: pri_mi2s_sd0_active { + mux { + pins = "gpio139"; + function = "mi2s0_data0"; + }; + + config { + pins = "gpio139"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + pri_mi2s_sd1 { + pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep { + mux { + pins = "gpio140"; + function = "gpio"; + }; + + config { + pins = "gpio140"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_mi2s_sd1_active: pri_mi2s_sd1_active { + mux { + pins = "gpio140"; + function = "mi2s0_data1"; + }; + + config { + pins = "gpio140"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + sec_mi2s_mclk { + sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep { + mux { + pins = "gpio137"; + function = "gpio"; + }; + + config { + pins = "gpio137"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_mi2s_mclk_active: sec_mi2s_mclk_active { + mux { + pins = "gpio137"; + function = "sec_mi2s"; + }; + + config { + pins = "gpio137"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + sec_mi2s_sck { + sec_mi2s_sck_sleep: sec_mi2s_sck_sleep { + mux { + pins = "gpio142"; + function = "gpio"; + }; + + config { + pins = "gpio142"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_mi2s_sck_active: sec_mi2s_sck_active { + mux { + pins = "gpio142"; + function = "mi2s1_sck"; + }; + + config { + pins = "gpio142"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_mi2s_ws { + sec_mi2s_ws_sleep: sec_mi2s_ws_sleep { + mux { + pins = "gpio145"; + function = "gpio"; + }; + + config { + pins = "gpio145"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_mi2s_ws_active: sec_mi2s_ws_active { + mux { + pins = "gpio145"; + function = "mi2s1_ws"; + }; + + config { + pins = "gpio145"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_mi2s_sd0 { + sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep { + mux { + pins = "gpio143"; + function = "gpio"; + }; + + config { + pins = "gpio143"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_mi2s_sd0_active: sec_mi2s_sd0_active { + mux { + pins = "gpio143"; + function = "mi2s1_data0"; + }; + + config { + pins = "gpio143"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + sec_mi2s_sd1 { + sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep { + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_mi2s_sd1_active: sec_mi2s_sd1_active { + mux { + pins = "gpio144"; + function = "mi2s1_data1"; + }; + + config { + pins = "gpio144"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tert_mi2s_sck { + tert_mi2s_sck_sleep: tert_mi2s_sck_sleep { + mux { + pins = "gpio133"; + function = "gpio"; + }; + + config { + pins = "gpio133"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_mi2s_sck_active: tert_mi2s_sck_active { + mux { + pins = "gpio133"; + function = "mi2s2_sck"; + }; + + config { + pins = "gpio133"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tert_mi2s_ws { + tert_mi2s_ws_sleep: tert_mi2s_ws_sleep { + mux { + pins = "gpio135"; + function = "gpio"; + }; + + config { + pins = "gpio135"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_mi2s_ws_active: tert_mi2s_ws_active { + mux { + pins = "gpio135"; + function = "mi2s2_ws"; + }; + + config { + pins = "gpio135"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tert_mi2s_sd0 { + tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep { + mux { + pins = "gpio134"; + function = "gpio"; + }; + + config { + pins = "gpio134"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_mi2s_sd0_active: tert_mi2s_sd0_active { + mux { + pins = "gpio134"; + function = "mi2s2_data0"; + }; + + config { + pins = "gpio134"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + tert_mi2s_sd1 { + tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep { + mux { + pins = "gpio137"; + function = "gpio"; + }; + + config { + pins = "gpio137"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + tert_mi2s_sd1_active: tert_mi2s_sd1_active { + mux { + pins = "gpio137"; + function = "mi2s2_data1"; + }; + + config { + pins = "gpio137"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + /* WSA speaker reset pins */ + spkr_1_sd_n { + spkr_1_sd_n_sleep: spkr_1_sd_n_sleep { + mux { + pins = "gpio26"; + function = "gpio"; + }; + + config { + pins = "gpio26"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + spkr_1_sd_n_active: spkr_1_sd_n_active { + mux { + pins = "gpio26"; + function = "gpio"; + }; + + config { + pins = "gpio26"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; + + spkr_2_sd_n { + spkr_2_sd_n_sleep: spkr_2_sd_n_sleep { + mux { + pins = "gpio127"; + function = "gpio"; + }; + + config { + pins = "gpio127"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; + input-enable; + }; + }; + + spkr_2_sd_n_active: spkr_2_sd_n_active { + mux { + pins = "gpio127"; + function = "gpio"; + }; + + config { + pins = "gpio127"; + drive-strength = <16>; /* 16 mA */ + bias-disable; + output-high; + }; + }; + }; + + wcd938x_reset_active: wcd938x_reset_active { + mux { + pins = "gpio32"; + function = "func2"; + }; + + config { + pins = "gpio32"; + drive-strength = <16>; + output-high; + }; + }; + + wcd938x_reset_sleep: wcd938x_reset_sleep { + mux { + pins = "gpio32"; + function = "func2"; + }; + + config { + pins = "gpio32"; + drive-strength = <16>; + bias-disable; + output-low; + }; + }; + + cam_sensor_mclk0_active: cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio94"; + function = "cam_mclk"; + }; + + config { + pins = "gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio94"; + function = "cam_mclk"; + }; + + config { + pins = "gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk1_active: cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio95"; + function = "cam_mclk"; + }; + + config { + pins = "gpio95"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio95"; + function = "cam_mclk"; + }; + + config { + pins = "gpio95"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk2_active: cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio96"; + function = "cam_mclk"; + }; + + config { + pins = "gpio96"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio96"; + function = "cam_mclk"; + }; + + config { + pins = "gpio96"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk3_active: cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio97"; + function = "cam_mclk"; + }; + + config { + pins = "gpio97"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio97"; + function = "cam_mclk"; + }; + + config { + pins = "gpio97"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk4_active: cam_sensor_mclk4_active { + /* MCLK4 */ + mux { + pins = "gpio98"; + function = "cam_mclk"; + }; + + config { + pins = "gpio98"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk4_suspend: cam_sensor_mclk4_suspend { + /* MCLK4 */ + mux { + pins = "gpio98"; + function = "cam_mclk"; + }; + + config { + pins = "gpio98"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk5_active: cam_sensor_mclk5_active { + /* MCLK5 */ + mux { + pins = "gpio99"; + function = "cam_mclk"; + }; + + config { + pins = "gpio99"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk5_suspend: cam_sensor_mclk5_suspend { + /* MCLK5 */ + mux { + pins = "gpio99"; + function = "cam_mclk"; + }; + + config { + pins = "gpio99"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk6_active: cam_sensor_mclk6_active { + /* MCLK6 */ + mux { + pins = "gpio100"; + function = "cam_mclk"; + }; + + config { + pins = "gpio100"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk6_suspend: cam_sensor_mclk6_suspend { + /* MCLK6 */ + mux { + pins = "gpio100"; + function = "cam_mclk"; + }; + + config { + pins = "gpio100"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_active_rear: cam_sensor_active_rear { + /* RESET REAR */ + mux { + pins = "gpio93"; + function = "gpio"; + }; + + config { + pins = "gpio93"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rear: cam_sensor_suspend_rear { + /* RESET REAR */ + mux { + pins = "gpio93"; + function = "gpio"; + }; + + config { + pins = "gpio93"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rear_aux: cam_sensor_active_rear_aux { + /* RESET REARAUX */ + mux { + pins = "gpio92"; + function = "gpio"; + }; + + config { + pins = "gpio92"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rear_aux: cam_sensor_suspend_rear_aux { + /* RESET REARAUX */ + mux { + pins = "gpio92"; + function = "gpio"; + }; + + config { + pins = "gpio92"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst2: cam_sensor_active_rst2 { + /* RESET 2 */ + mux { + pins = "gpio78"; + function = "gpio"; + }; + + config { + pins = "gpio78"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst2: cam_sensor_suspend_rst2 { + /* RESET 2 */ + mux { + pins = "gpio78"; + function = "gpio"; + }; + + config { + pins = "gpio78"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_3: cam_sensor_active_3 { + /* RESET 3 */ + mux { + pins = "gpio109"; + function = "gpio"; + }; + + config { + pins = "gpio109"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_3: cam_sensor_suspend_3 { + /* RESET 3 */ + mux { + pins = "gpio109"; + function = "gpio"; + }; + + config { + pins = "gpio109"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst4: cam_sensor_active_rst4 { + /* RESET 2 */ + mux { + pins = "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio25"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst4: cam_sensor_suspend_rst4 { + /* RESET 2 */ + mux { + pins = "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio25"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst3: cam_sensor_active_rst3 { + /* RESET 2 */ + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst3: cam_sensor_suspend_rst3 { + /* RESET 2 */ + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_4: cam_sensor_active_4 { + /* RESET 4 */ + mux { + pins = "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio130"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_4: cam_sensor_suspend_4 { + /* RESET 4 */ + mux { + pins = "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio130"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_5: cam_sensor_active_5 { + /* RESET 5 */ + mux { + pins = "gpio131"; + function = "gpio"; + }; + + config { + pins = "gpio131"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_5: cam_sensor_suspend_5 { + /* RESET 5 */ + mux { + pins = "gpio131"; + function = "gpio"; + }; + + config { + pins = "gpio131"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_6: cam_sensor_active_6 { + /* RESET 6 */ + mux { + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_6: cam_sensor_suspend_6 { + /* RESET 6 */ + mux { + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cci0_active: cci0_active { + mux { + /* CLK, DATA */ + pins = "gpio101","gpio102"; // Only 2 + function = "cci_i2c"; + }; + + config { + pins = "gpio101","gpio102"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci0_suspend: cci0_suspend { + mux { + /* CLK, DATA */ + pins = "gpio101","gpio102"; + function = "cci_i2c"; + }; + + config { + pins = "gpio101","gpio102"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci1_active: cci1_active { + mux { + /* CLK, DATA */ + pins = "gpio103","gpio104"; + function = "cci_i2c"; + }; + + config { + pins = "gpio103","gpio104"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci1_suspend: cci1_suspend { + mux { + /* CLK, DATA */ + pins = "gpio103","gpio104"; + function = "cci_i2c"; + }; + + config { + pins = "gpio103","gpio104"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci2_active: cci2_active { + mux { + /* CLK, DATA */ + pins = "gpio105","gpio106"; + function = "cci_i2c"; + }; + + config { + pins = "gpio105","gpio106"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci2_suspend: cci2_suspend { + mux { + /* CLK, DATA */ + pins = "gpio105","gpio106"; + function = "cci_i2c"; + }; + + config { + pins = "gpio105","gpio106"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci3_active: cci3_active { + mux { + /* CLK, DATA */ + pins = "gpio107","gpio108"; + function = "cci_i2c"; + }; + + config { + pins = "gpio107","gpio108"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci3_suspend: cci3_suspend { + mux { + /* CLK, DATA */ + pins = "gpio107","gpio108"; + function = "cci_i2c"; + }; + + config { + pins = "gpio107","gpio108"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + tsif0_signals_active: tsif0_signals_active { + tsif1_clk { + pins = "gpio69"; /* TSIF0 CLK */ + function = "tsif0_clk"; + }; + + tsif1_en { + pins = "gpio70"; /* TSIF0 Enable */ + function = "tsif0_en"; + }; + + tsif1_data { + pins = "gpio71"; /* TSIF0 DATA */ + function = "tsif0_data"; + }; + + signals_cfg { + pins = "gpio69", "gpio70", "gpio71"; + drive_strength = <2>; /* 2 mA */ + bias-pull-down; /* pull down */ + }; + }; + + /* sync signal is only used if configured to mode-2 */ + tsif0_sync_active: tsif0_sync_active { + tsif1_sync { + pins = "gpio72"; /* TSIF0 SYNC */ + function = "tsif0_sync"; + drive_strength = <2>; /* 2 mA */ + bias-pull-down; /* pull down */ + }; + }; + + tsif1_signals_active: tsif1_signals_active { + tsif2_clk { + pins = "gpio73"; /* TSIF1 CLK */ + function = "tsif1_clk"; + }; + + tsif2_en { + pins = "gpio74"; /* TSIF1 Enable */ + function = "tsif1_en"; + }; + + tsif2_data { + pins = "gpio75"; /* TSIF1 DATA */ + function = "tsif1_data"; + }; + + signals_cfg { + pins = "gpio73", "gpio74", "gpio75"; + drive_strength = <2>; /* 2 mA */ + bias-pull-down; /* pull down */ + }; + }; + + /* sync signal is only used if configured to mode-2 */ + tsif1_sync_active: tsif1_sync_active { + tsif2_sync { + pins = "gpio76"; /* TSIF1 SYNC */ + function = "tsif1_sync"; + drive_strength = <2>; /* 2 mA */ + bias-pull-down; /* pull down */ + }; + }; + + sde_led_driver_en1_gpio: sde_led_driver_en1_gpio { + mux { + pins = "gpio144"; + function = "gpio"; + }; + + config { + pins = "gpio144"; + bias-pull-down; + drive-strength = <16>; + }; + }; + + sde_led_driver_en2_gpio: sde_led_driver_en2_gpio { + mux { + pins = "gpio140"; + function = "gpio"; + }; + + config { + pins = "gpio140"; + bias-pull-down; + drive-strength = <16>; + }; + }; + + sde_led_5v_en_gpio: sde_led_5v_en_gpio { + mux { + pins = "gpio134"; + function = "gpio"; + }; + + config { + pins = "gpio134"; + bias-pull-down; + drive-strength = <16>; + }; + }; + + sde_display_1p8_en_gpio: sde_display_1p8_en_gpio { + mux { + pins = "gpio133"; + function = "gpio"; + }; + + config { + pins = "gpio133"; + bias-pull-down; + drive-strength = <16>; + }; + }; + + cam_sensor_6dof_vana_active: cam_sensor_6dof_vana_active { + /* AVDD LDO */ + mux { + pins = "gpio84"; + function = "gpio"; + }; + + config { + pins = "gpio84"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_6dof_vana_suspend: cam_sensor_6dof_vana_suspend { + /* AVDD LDO */ + mux { + pins = "gpio84"; + function = "gpio"; + }; + + config { + pins = "gpio84"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_6dof_vdig_active: cam_sensor_6dof_vdig_active { + /* VDIG LDO */ + mux { + pins = "gpio82"; + function = "gpio"; + }; + + config { + pins = "gpio82"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_6dof_vdig_suspend: cam_sensor_6dof_vdig_suspend { + /* VDIG LDO */ + mux { + pins = "gpio82"; + function = "gpio"; + }; + + config { + pins = "gpio82"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_6dof_vio_active: cam_sensor_6dof_vio_active { + /* VIO LDO */ + mux { + pins = "gpio83"; + function = "gpio"; + }; + + config { + pins = "gpio83"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_6dof_vio_suspend: cam_sensor_6dof_vio_suspend { + /* VIO LDO */ + mux { + pins = "gpio83"; + function = "gpio"; + }; + + config { + pins = "gpio83"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_et_vana_active: cam_sensor_et_vana_active { + /* AVDD LDO */ + mux { + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_et_vana_suspend: cam_sensor_et_vana_suspend { + /* AVDD LDO */ + mux { + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_et_vio_active: cam_sensor_et_vio_active { + /* VIO LDO */ + mux { + pins = "gpio145"; + function = "gpio"; + }; + + config { + pins = "gpio145"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_et_vio_suspend: cam_sensor_et_vio_suspend { + /* VIO LDO */ + mux { + pins = "gpio145"; + function = "gpio"; + }; + + config { + pins = "gpio145"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_rgb_vana_active: cam_sensor_rgb_vana_active { + mux { + pins = "gpio117"; + function = "gpio"; + }; + + config { + pins = "gpio117"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_rgb_vana_suspend: cam_sensor_rgb_vana_suspend { + mux { + pins = "gpio117"; + function = "gpio"; + }; + + config { + pins = "gpio117"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_rgb_vio_active: cam_sensor_rgb_vio_active { + mux { + pins = "gpio116"; + function = "gpio"; + }; + + config { + pins = "gpio116"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_rgb_vio_suspend: cam_sensor_rgb_vio_suspend { + mux { + pins = "gpio116"; + function = "gpio"; + }; + + config { + pins = "gpio116"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_rgb_vdig_active: cam_sensor_rgb_vdig_active { + mux { + pins = "gpio115"; + function = "gpio"; + }; + + config { + pins = "gpio115"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_rgb_vdig_suspend: cam_sensor_rgb_vdig_suspend { + mux { + pins = "gpio115"; + function = "gpio"; + }; + + config { + pins = "gpio115"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_active_etleft: cam_sensor_active_etleft { + /* RESET REAR */ + mux { + pins = "gpio93"; + function = "gpio"; + }; + + config { + pins = "gpio93"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_etleft: cam_sensor_suspend_etleft { + /* RESET REAR */ + mux { + pins = "gpio93"; + function = "gpio"; + }; + + config { + pins = "gpio93"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_etright: cam_sensor_active_etright { + /* RESET REAR */ + mux { + pins = "gpio92"; + function = "gpio"; + }; + + config { + pins = "gpio92"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_etright: cam_sensor_suspend_etright { + /* RESET REAR */ + mux { + pins = "gpio92"; + function = "gpio"; + }; + + config { + pins = "gpio92"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_6dofleft: cam_sensor_active_6dofleft { + /* RESET REAR */ + mux { + pins = "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio130"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_6dofleft: cam_sensor_suspend_6dofleft { + /* RESET REAR */ + mux { + pins = "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio130"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_6dofright: cam_sensor_active_6dofright { + /* RESET REAR */ + mux { + pins = "gpio131"; + function = "gpio"; + }; + + config { + pins = "gpio131"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_6dofright: cam_sensor_suspend_6dofright { + /* RESET REAR */ + mux { + pins = "gpio131"; + function = "gpio"; + }; + + config { + pins = "gpio131"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rgbright: cam_sensor_active_rgbright { + /* RESET REAR */ + mux { + pins = "gpio109"; + function = "gpio"; + }; + + config { + pins = "gpio109"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rgbright: cam_sensor_suspend_rgbright { + /* RESET REAR */ + mux { + pins = "gpio109"; + function = "gpio"; + }; + + config { + pins = "gpio109"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rgbleft: cam_sensor_active_rgbleft { + /* RESET REAR */ + mux { + pins = "gpio78"; + function = "gpio"; + }; + + config { + pins = "gpio78"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rgbleft: cam_sensor_suspend_rgbleft { + /* RESET REAR */ + mux { + pins = "gpio78"; + function = "gpio"; + }; + + config { + pins = "gpio78"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + bt_en_sleep: bt_en_sleep { + mux { + pins = "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + + /* QUPv3_0 North SE0 mappings */ + qupv3_se0_i3c_pins: qupv3_se0_i3c_pins { + qupv3_se0_i3c_active: qupv3_se0_i3c_active { + mux { + pins = "gpio28", "gpio29"; + function = "ibi_i3c"; + }; + + config { + pins = "gpio28", "gpio29"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + qupv3_se0_i3c_sleep: qupv3_se0_i3c_sleep { + mux { + pins = "gpio28", "gpio29"; + function = "ibi_i3c"; + }; + + config { + pins = "gpio28", "gpio29"; + drive-strength = <16>; + bias-pull-up; + }; + }; + }; + + /* QUPv3_0 North SE1 mappings */ + qupv3_se1_i3c_pins: qupv3_se1_i3c_pins { + qupv3_se1_i3c_active: qupv3_se1_i3c_active { + mux { + pins = "gpio4", "gpio5"; + function = "ibi_i3c"; + }; + + config { + pins = "gpio4", "gpio5"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + qupv3_se1_i3c_sleep: qupv3_se1_i3c_sleep { + mux { + pins = "gpio4", "gpio5"; + function = "ibi_i3c"; + }; + + config { + pins = "gpio4", "gpio5"; + drive-strength = <16>; + bias-pull-up; + }; + }; + }; + + /* SE 0 pin mappings */ + qupv3_se0_i2c_pins: qupv3_se0_i2c_pins { + qupv3_se0_i2c_active: qupv3_se0_i2c_active { + mux { + pins = "gpio28", "gpio29"; + function = "qup0"; + }; + + config { + pins = "gpio28", "gpio29"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep { + mux { + pins = "gpio28", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio29"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 1 pin mappings */ + qupv3_se1_i2c_pins: qupv3_se1_i2c_pins { + qupv3_se1_i2c_active: qupv3_se1_i2c_active { + mux { + pins = "gpio4", "gpio5"; + function = "qup1"; + }; + + config { + pins = "gpio4", "gpio5"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep { + mux { + pins = "gpio4", "gpio5"; + function = "gpio"; + }; + + config { + pins = "gpio4", "gpio5"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + lt9611_pins: lt9611_pins { + mux { + pins = "gpio2", "gpio1"; + function = "gpio"; + }; + + config { + pins = "gpio2", "gpio1"; + drive-strength = <8>; + bias-disable = <0>; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 111 NFC Read Interrupt */ + pins = "gpio111"; + function = "gpio"; + }; + + config { + pins = "gpio111"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 111 NFC Read Interrupt */ + pins = "gpio111"; + function = "gpio"; + }; + + config { + pins = "gpio111"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 6: Enable 110: Firmware */ + pins = "gpio6", "gpio110"; + function = "gpio"; + }; + + config { + pins = "gpio6", "gpio110"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 6: Enable 110: Firmware */ + pins = "gpio6", "gpio110"; + function = "gpio"; + }; + + config { + pins = "gpio6", "gpio110"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* GPIO 7: NFC CLOCK REQUEST */ + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* GPIO 7: NFC CLOCK REQUEST */ + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + + /* SE 2 pin mappings */ + qupv3_se2_i2c_pins: qupv3_se2_i2c_pins { + qupv3_se2_i2c_active: qupv3_se2_i2c_active { + mux { + pins = "gpio115", "gpio116"; + function = "qup2"; + }; + + config { + pins = "gpio115", "gpio116"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep { + mux { + pins = "gpio115", "gpio116"; + function = "gpio"; + }; + + config { + pins = "gpio115", "gpio116"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 3 pin mappings */ + qupv3_se3_i2c_pins: qupv3_se3_i2c_pins { + qupv3_se3_i2c_active: qupv3_se3_i2c_active { + mux { + pins = "gpio119", "gpio120"; + function = "qup3"; + }; + + config { + pins = "gpio119", "gpio120"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep { + mux { + pins = "gpio119", "gpio120"; + function = "gpio"; + }; + + config { + pins = "gpio119", "gpio120"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 4 pin mappings */ + qupv3_se4_i2c_pins: qupv3_se4_i2c_pins { + qupv3_se4_i2c_active: qupv3_se4_i2c_active { + mux { + pins = "gpio8", "gpio9"; + function = "qup4"; + }; + + config { + pins = "gpio8", "gpio9"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep { + mux { + pins = "gpio8", "gpio9"; + function = "gpio"; + }; + + config { + pins = "gpio8", "gpio9"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 5 pin mappings */ + qupv3_se5_i2c_pins: qupv3_se5_i2c_pins { + qupv3_se5_i2c_active: qupv3_se5_i2c_active { + mux { + pins = "gpio12", "gpio13"; + function = "qup5"; + }; + + config { + pins = "gpio12", "gpio13"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep { + mux { + pins = "gpio12", "gpio13"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio13"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 6 pin mappings */ + qupv3_se6_i2c_pins: qupv3_se6_i2c_pins { + qupv3_se6_i2c_active: qupv3_se6_i2c_active { + mux { + pins = "gpio16", "gpio17"; + function = "qup6"; + }; + + config { + pins = "gpio16", "gpio17"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep { + mux { + pins = "gpio16", "gpio17"; + function = "gpio"; + }; + + config { + pins = "gpio16", "gpio17"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 7 pin mappings */ + qupv3_se7_i2c_pins: qupv3_se7_i2c_pins { + qupv3_se7_i2c_active: qupv3_se7_i2c_active { + mux { + pins = "gpio20", "gpio21"; + function = "qup7"; + }; + + config { + pins = "gpio20", "gpio21"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep { + mux { + pins = "gpio20", "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio20", "gpio21"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + qupv3_se0_spi_pins: qupv3_se0_spi_pins { + qupv3_se0_spi_active: qupv3_se0_spi_active { + mux { + pins = "gpio28", "gpio29", "gpio30", + "gpio31"; + function = "qup0"; + }; + + config { + pins = "gpio28", "gpio29", "gpio30", + "gpio31"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se0_spi_sleep: qupv3_se0_spi_sleep { + mux { + pins = "gpio28", "gpio29", "gpio30", + "gpio31"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio29", "gpio30", + "gpio31"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se1_spi_pins: qupv3_se1_spi_pins { + qupv3_se1_spi_active: qupv3_se1_spi_active { + mux { + pins = "gpio4", "gpio5", "gpio6", + "gpio7"; + function = "qup1"; + }; + + config { + pins = "gpio4", "gpio5", "gpio6", + "gpio7"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se1_spi_sleep: qupv3_se1_spi_sleep { + mux { + pins = "gpio4", "gpio5", "gpio6", + "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio4", "gpio5", "gpio6", + "gpio7"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se2_spi_pins: qupv3_se2_spi_pins { + qupv3_se2_spi_active: qupv3_se2_spi_active { + mux { + pins = "gpio115", "gpio116", "gpio117", + "gpio118"; + function = "qup2"; + }; + + config { + pins = "gpio115", "gpio116", "gpio117", + "gpio118"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se2_spi_sleep: qupv3_se2_spi_sleep { + mux { + pins = "gpio115", "gpio116", "gpio117", + "gpio118"; + function = "gpio"; + }; + + config { + pins = "gpio115", "gpio116", "gpio117", + "gpio118"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se3_spi_pins: qupv3_se3_spi_pins { + qupv3_se3_spi_active: qupv3_se3_spi_active { + mux { + pins = "gpio119", "gpio120", "gpio121", + "gpio122"; + function = "qup3"; + }; + + config { + pins = "gpio119", "gpio120", "gpio121", + "gpio122"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se3_spi_sleep: qupv3_se3_spi_sleep { + mux { + pins = "gpio119", "gpio120", "gpio121", + "gpio122"; + function = "gpio"; + }; + + config { + pins = "gpio119", "gpio120", "gpio121", + "gpio122"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se4_spi_pins: qupv3_se4_spi_pins { + qupv3_se4_spi_active: qupv3_se4_spi_active { + mux { + pins = "gpio8", "gpio9", "gpio10", + "gpio11"; + function = "qup4"; + }; + + config { + pins = "gpio8", "gpio9", "gpio10", + "gpio11"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se4_spi_sleep: qupv3_se4_spi_sleep { + mux { + pins = "gpio8", "gpio9", "gpio10", + "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio8", "gpio9", "gpio10", + "gpio11"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se5_spi_pins: qupv3_se5_spi_pins { + qupv3_se5_spi_active: qupv3_se5_spi_active { + mux { + pins = "gpio12", "gpio13", "gpio14", + "gpio15"; + function = "qup5"; + }; + + config { + pins = "gpio12", "gpio13", "gpio14", + "gpio15"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se5_spi_sleep: qupv3_se5_spi_sleep { + mux { + pins = "gpio12", "gpio13", "gpio14", + "gpio15"; + function = "gpio"; + }; + + config { + pins = "gpio12", "13", "gpio14", + "gpio15"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se6_spi_pins: qupv3_se6_spi_pins { + qupv3_se6_spi_active: qupv3_se6_spi_active { + mux { + pins = "gpio16", "gpio17", "gpio18", + "gpio19"; + function = "qup6"; + }; + + config { + pins = "gpio16", "gpio17", "gpio18", + "gpio19"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se6_spi_sleep: qupv3_se6_spi_sleep { + mux { + pins = "gpio16", "gpio17", "gpio18", + "gpio19"; + function = "gpio"; + }; + + config { + pins = "gpio16", "gpio17", "gpio18", + "gpio19"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se7_spi_pins: qupv3_se7_spi_pins { + qupv3_se7_spi_active: qupv3_se7_spi_active { + mux { + pins = "gpio20", "gpio21", "gpio22", + "gpio23"; + function = "qup7"; + }; + + config { + pins = "gpio20", "gpio21", "gpio22", + "gpio23"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se7_spi_sleep: qupv3_se7_spi_sleep { + mux { + pins = "gpio20", "gpio21", "gpio22", + "gpio23"; + function = "gpio"; + }; + + config { + pins = "gpio20", "gpio21", "gpio22", + "gpio23"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + /* QUPv3_1 South_1 SE mappings */ + /* SE 8 pin mappings */ + qupv3_se8_i2c_pins: qupv3_se8_i2c_pins { + qupv3_se8_i2c_active: qupv3_se8_i2c_active { + mux { + pins = "gpio24", "gpio25"; + function = "qup8"; + }; + + config { + pins = "gpio24", "gpio25"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep { + mux { + pins = "gpio24", "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio24", "gpio25"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 9 pin mappings */ + qupv3_se9_i2c_pins: qupv3_se9_i2c_pins { + qupv3_se9_i2c_active: qupv3_se9_i2c_active { + mux { + pins = "gpio125", "gpio126"; + function = "qup9"; + }; + + config { + pins = "gpio125", "gpio126"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep { + mux { + pins = "gpio125", "gpio126"; + function = "gpio"; + }; + + config { + pins = "gpio125", "gpio126"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 10 pin mappings */ + qupv3_se10_i2c_pins: qupv3_se10_i2c_pins { + qupv3_se10_i2c_active: qupv3_se10_i2c_active { + mux { + pins = "gpio129", "gpio130"; + function = "qup10"; + }; + + config { + pins = "gpio129", "gpio130"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep { + mux { + pins = "gpio129", "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio129", "gpio130"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 11 pin mappings */ + qupv3_se11_i2c_pins: qupv3_se11_i2c_pins { + qupv3_se11_i2c_active: qupv3_se11_i2c_active { + mux { + pins = "gpio60", "gpio61"; + function = "qup11"; + }; + + config { + pins = "gpio60", "gpio61"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep { + mux { + pins = "gpio60", "gpio61"; + function = "gpio"; + }; + + config { + pins = "gpio60", "gpio61"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 12 pin mappings */ + qupv3_se12_i2c_pins: qupv3_se12_i2c_pins { + qupv3_se12_i2c_active: qupv3_se12_i2c_active { + mux { + pins = "gpio32", "gpio33"; + function = "qup12"; + }; + + config { + pins = "gpio32", "gpio33"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep { + mux { + pins = "gpio32", "gpio33"; + function = "gpio"; + }; + + config { + pins = "gpio32", "gpio33"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 13 pin mappings */ + qupv3_se13_i2c_pins: qupv3_se13_i2c_pins { + qupv3_se13_i2c_active: qupv3_se13_i2c_active { + mux { + pins = "gpio36", "gpio37"; + function = "qup13"; + }; + + config { + pins = "gpio36", "gpio37"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep { + mux { + pins = "gpio36", "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio36", "gpio37"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + qupv3_se8_spi_pins: qupv3_se8_spi_pins { + qupv3_se8_spi_active: qupv3_se8_spi_active { + mux { + pins = "gpio24", "gpio25", "gpio26", + "gpio27"; + function = "qup8"; + }; + + config { + pins = "gpio24", "gpio25", "gpio26", + "gpio27"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se8_spi_sleep: qupv3_se8_spi_sleep { + mux { + pins = "gpio24", "gpio25", "gpio26", + "gpio27"; + function = "gpio"; + }; + + config { + pins = "gpio24", "gpio25", "gpio26", + "gpio27"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se9_spi_pins: qupv3_se9_spi_pins { + qupv3_se9_spi_active: qupv3_se9_spi_active { + mux { + pins = "gpio125", "gpio126", "gpio127", + "gpio128"; + function = "qup9"; + }; + + config { + pins = "gpio125", "gpio126", "gpio127", + "gpio128"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se9_spi_sleep: qupv3_se9_spi_sleep { + mux { + pins = "gpio125", "gpio126", "gpio127", + "gpio128"; + function = "gpio"; + }; + + config { + pins = "gpio125", "gpio126", "gpio127", + "gpio128"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se10_spi_pins: qupv3_se10_spi_pins { + qupv3_se10_spi_active: qupv3_se10_spi_active { + mux { + pins = "gpio129", "gpio130", "gpio131", + "gpio132"; + function = "qup10"; + }; + + config { + pins = "gpio129", "gpio130", "gpio131", + "gpio132"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se10_spi_sleep: qupv3_se10_spi_sleep { + mux { + pins = "gpio129", "gpio130", "gpio131", + "gpio132"; + function = "gpio"; + }; + + config { + pins = "gpio129", "gpio130", "gpio131", + "gpio132"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se11_spi_pins: qupv3_se11_spi_pins { + qupv3_se11_spi_active: qupv3_se11_spi_active { + mux { + pins = "gpio60", "gpio61", "gpio62", + "gpio63"; + function = "qup11"; + }; + + config { + pins = "gpio60", "gpio61", "gpio62", + "gpio63"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se11_spi_sleep: qupv3_se11_spi_sleep { + mux { + pins = "gpio60", "gpio61", "gpio62", + "gpio63"; + function = "gpio"; + }; + + config { + pins = "gpio60", "gpio61", "gpio62", + "gpio63"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se12_spi_pins: qupv3_se12_spi_pins { + qupv3_se12_spi_active: qupv3_se12_spi_active { + mux { + pins = "gpio32", "gpio33", "gpio34", + "gpio35"; + function = "qup12"; + }; + + config { + pins = "gpio32", "gpio33", "gpio34", + "gpio35"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se12_spi_sleep: qupv3_se12_spi_sleep { + mux { + pins = "gpio32", "gpio33", "gpio34", + "gpio35"; + function = "gpio"; + }; + + config { + pins = "gpio32", "gpio33", "gpio34", + "gpio35"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se13_spi_pins: qupv3_se13_spi_pins { + qupv3_se13_spi_active: qupv3_se13_spi_active { + mux { + pins = "gpio36", "gpio37", "gpio38", + "gpio39"; + function = "qup13"; + }; + + config { + pins = "gpio36", "gpio37", "gpio38", + "gpio39"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se13_spi_sleep: qupv3_se13_spi_sleep { + mux { + pins = "gpio36", "gpio37", "gpio38", + "gpio39"; + function = "gpio"; + }; + + config { + pins = "gpio36", "gpio37", "gpio38", + "gpio39"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + /* QUPv3_2 South_2 SE mappings */ + /* SE 14 pin mappings */ + qupv3_se14_i2c_pins: qupv3_se14_i2c_pins { + qupv3_se14_i2c_active: qupv3_se14_i2c_active { + mux { + pins = "gpio40", "gpio41"; + function = "qup14"; + }; + + config { + pins = "gpio40", "gpio41"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep { + mux { + pins = "gpio40", "gpio41"; + function = "gpio"; + }; + + config { + pins = "gpio40", "gpio41"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 15 pin mappings */ + qupv3_se15_i2c_pins: qupv3_se15_i2c_pins { + qupv3_se15_i2c_active: qupv3_se15_i2c_active { + mux { + pins = "gpio44", "gpio45"; + function = "qup15"; + }; + + config { + pins = "gpio44", "gpio45"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep { + mux { + pins = "gpio44", "gpio45"; + function = "gpio"; + }; + + config { + pins = "gpio44", "gpio45"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 16 pin mappings */ + qupv3_se16_i2c_pins: qupv3_se16_i2c_pins { + qupv3_se16_i2c_active: qupv3_se16_i2c_active { + mux { + pins = "gpio48", "gpio49"; + function = "qup16"; + }; + + config { + pins = "gpio48", "gpio49"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se16_i2c_sleep: qupv3_se16_i2c_sleep { + mux { + pins = "gpio48", "gpio49"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio49"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 17 pin mappings */ + qupv3_se17_i2c_pins: qupv3_se17_i2c_pins { + qupv3_se17_i2c_active: qupv3_se17_i2c_active { + mux { + pins = "gpio52", "gpio53"; + function = "qup17"; + }; + + config { + pins = "gpio52", "gpio53"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se17_i2c_sleep: qupv3_se17_i2c_sleep { + mux { + pins = "gpio52", "gpio53"; + function = "gpio"; + }; + + config { + pins = "gpio52", "gpio53"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 18 pin mappings */ + qupv3_se18_i2c_pins: qupv3_se18_i2c_pins { + qupv3_se18_i2c_active: qupv3_se18_i2c_active { + mux { + pins = "gpio56", "gpio57"; + function = "qup18"; + }; + + config { + pins = "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se18_i2c_sleep: qupv3_se18_i2c_sleep { + mux { + pins = "gpio56", "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio56", "gpio57"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + /* SE 19 pin mappings */ + qupv3_se19_i2c_pins: qupv3_se19_i2c_pins { + qupv3_se19_i2c_active: qupv3_se19_i2c_active { + mux { + pins = "gpio0", "gpio1"; + function = "qup19"; + }; + + config { + pins = "gpio0", "gpio1"; + drive-strength = <2>; + bias-disable; + }; + }; + + qupv3_se19_i2c_sleep: qupv3_se19_i2c_sleep { + mux { + pins = "gpio0", "gpio1"; + function = "gpio"; + }; + + config { + pins = "gpio0", "gpio1"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + qupv3_se14_spi_pins: qupv3_se14_spi_pins { + qupv3_se14_spi_active: qupv3_se14_spi_active { + mux { + pins = "gpio40", "gpio41", "gpio42", + "gpio43"; + function = "qup14"; + }; + + config { + pins = "gpio40", "gpio41", "gpio42", + "gpio43"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se14_spi_sleep: qupv3_se14_spi_sleep { + mux { + pins = "gpio40", "gpio41", "gpio42", + "gpio43"; + function = "gpio"; + }; + + config { + pins = "gpio40", "gpio41", "gpio42", + "gpio43"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se15_spi_pins: qupv3_se15_spi_pins { + qupv3_se15_spi_active: qupv3_se15_spi_active { + mux { + pins = "gpio44", "gpio45", "gpio46", + "gpio47"; + function = "qup15"; + }; + + config { + pins = "gpio44", "gpio45", "gpio46", + "gpio47"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se15_spi_sleep: qupv3_se15_spi_sleep { + mux { + pins = "gpio44", "gpio45", "gpio46", + "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio44", "gpio45", "gpio46", + "gpio47"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se16_spi_pins: qupv3_se16_spi_pins { + qupv3_se16_spi_active: qupv3_se16_spi_active { + mux { + pins = "gpio48", "gpio49", "gpio50", + "gpio51"; + function = "qup16"; + }; + + config { + pins = "gpio48", "gpio49", "gpio50", + "gpio51"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se16_spi_sleep: qupv3_se16_spi_sleep { + mux { + pins = "gpio48", "gpio49", "gpio50", + "gpio51"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio49", "gpio50", + "gpio51"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se17_spi_pins: qupv3_se17_spi_pins { + qupv3_se17_spi_active: qupv3_se17_spi_active { + mux { + pins = "gpio52", "gpio53", "gpio54", + "gpio55"; + function = "qup17"; + }; + + config { + pins = "gpio52", "gpio53", "gpio54", + "gpio55"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se17_spi_sleep: qupv3_se17_spi_sleep { + mux { + pins = "gpio52", "gpio53", "gpio54", + "gpio55"; + function = "gpio"; + }; + + config { + pins = "gpio52", "gpio53", "gpio54", + "gpio55"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se18_spi_pins: qupv3_se18_spi_pins { + qupv3_se18_spi_active: qupv3_se18_spi_active { + mux { + pins = "gpio56", "gpio57", "gpio58", + "gpio59"; + function = "qup18"; + }; + + config { + pins = "gpio56", "gpio57", "gpio58", + "gpio59"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se18_spi_sleep: qupv3_se18_spi_sleep { + mux { + pins = "gpio56", "gpio57", "gpio58", + "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio56", "gpio57", "gpio58", + "gpio59"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + qupv3_se19_spi_pins: qupv3_se19_spi_pins { + qupv3_se19_spi_active: qupv3_se19_spi_active { + mux { + pins = "gpio0", "gpio1", "gpio2", + "gpio3"; + function = "qup19"; + }; + + config { + pins = "gpio0", "gpio1", "gpio2", + "gpio3"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se19_spi_sleep: qupv3_se19_spi_sleep { + mux { + pins = "gpio0", "gpio1", "gpio2", + "gpio3"; + function = "gpio"; + }; + + config { + pins = "gpio0", "gpio1", "gpio2", + "gpio3"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + usb2_id_det_default: usb2_id_det_default { + config { + pins = "gpio91"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + + wil6210_refclk_en_pin: wil6210_refclk_en_pin { + mux { + pins = "gpio14"; + function = "gpio"; + }; + + config { + pins = "gpio14"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + }; +}; diff --git a/qcom/kona-v2.1.dtsi b/qcom/kona-v2.1.dtsi new file mode 100644 index 00000000..bc62b4c1 --- /dev/null +++ b/qcom/kona-v2.1.dtsi @@ -0,0 +1,8 @@ + +#include "kona-v2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona v2.1"; + compatible = "qcom,kona"; + qcom,msm-id = <356 0x20001>; +}; diff --git a/qcom/kona-v2.dtsi b/qcom/kona-v2.dtsi new file mode 100644 index 00000000..a8058ccc --- /dev/null +++ b/qcom/kona-v2.dtsi @@ -0,0 +1,23 @@ +#include "kona.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona v2"; + compatible = "qcom,kona"; + qcom,msm-id = <356 0x20000>; +}; + +&CPU4 { + dynamic-power-coefficient = <533>; +}; + +&CPU5 { + dynamic-power-coefficient = <533>; +}; + +&CPU6 { + dynamic-power-coefficient = <533>; +}; + +&CPU7 { + dynamic-power-coefficient = <642>; +}; diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi new file mode 100644 index 00000000..4af2306a --- /dev/null +++ b/qcom/kona.dtsi @@ -0,0 +1,1108 @@ +#include +#include +#include +#include + +/ { + model = "Qualcomm Technologies, Inc. kona"; + compatible = "qcom,kona"; + qcom,msm-id = <356 0x10000>; + interrupt-parent = <&intc>; + + #address-cells = <2>; + #size-cells = <2>; + memory { device_type = "memory"; reg = <0 0 0 0>; }; + + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 kpti=off"; + }; + + reserved_memory: reserved-memory { }; + + aliases { }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "qcom,kryo"; + reg = <0x0 0x0>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0 4>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <100>; + #cooling-cells = <2>; + L2_0: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + + L3_0: l3-cache { + compatible = "arm,arch-cache"; + cache-level = <3>; + }; + }; + + L1_I_0: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_0: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU1: cpu@100 { + device_type = "cpu"; + compatible = "qcom,kryo"; + reg = <0x0 0x100>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_1>; + qcom,freq-domain = <&cpufreq_hw 0 4>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <100>; + L2_1: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_100: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_100: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU2: cpu@200 { + device_type = "cpu"; + compatible = "qcom,kryo"; + reg = <0x0 0x200>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_2>; + qcom,freq-domain = <&cpufreq_hw 0 4>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <100>; + L2_2: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_200: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_200: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU3: cpu@300 { + device_type = "cpu"; + compatible = "qcom,kryo"; + reg = <0x0 0x300>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_3>; + qcom,freq-domain = <&cpufreq_hw 0 4>; + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <100>; + L2_3: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_300: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_300: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU4: cpu@400 { + device_type = "cpu"; + compatible = "qcom,kryo"; + reg = <0x0 0x400>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_4>; + qcom,freq-domain = <&cpufreq_hw 1 4>; + capacity-dmips-mhz = <1894>; + dynamic-power-coefficient = <514>; + #cooling-cells = <2>; + L2_4: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_400: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_400: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU5: cpu@500 { + device_type = "cpu"; + compatible = "qcom,kryo"; + reg = <0x0 0x500>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_5>; + qcom,freq-domain = <&cpufreq_hw 1 4>; + capacity-dmips-mhz = <1894>; + dynamic-power-coefficient = <514>; + L2_5: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_500: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_500: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU6: cpu@600 { + device_type = "cpu"; + compatible = "qcom,kryo"; + reg = <0x0 0x600>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_6>; + qcom,freq-domain = <&cpufreq_hw 1 4>; + capacity-dmips-mhz = <1894>; + dynamic-power-coefficient = <514>; + L2_6: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_600: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_600: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + CPU7: cpu@700 { + device_type = "cpu"; + compatible = "qcom,kryo"; + reg = <0x0 0x700>; + enable-method = "psci"; + cpu-release-addr = <0x0 0x90000000>; + next-level-cache = <&L2_7>; + qcom,freq-domain = <&cpufreq_hw 2 4>; + capacity-dmips-mhz = <1894>; + dynamic-power-coefficient = <598>; + #cooling-cells = <2>; + L2_7: l2-cache { + compatible = "arm,arch-cache"; + cache-level = <2>; + next-level-cache = <&L3_0>; + }; + + L1_I_700: l1-icache { + compatible = "arm,arch-cache"; + }; + + L1_D_700: l1-dcache { + compatible = "arm,arch-cache"; + }; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + + core1 { + cpu = <&CPU1>; + }; + + core2 { + cpu = <&CPU2>; + }; + + core3 { + cpu = <&CPU3>; + }; + }; + + cluster1 { + core0 { + cpu = <&CPU4>; + }; + + core1 { + cpu = <&CPU5>; + }; + + core2 { + cpu = <&CPU6>; + }; + }; + + cluster2 { + core0 { + cpu = <&CPU7>; + }; + }; + }; + }; + + idle-states { + SILVER_OFF: silver-c4 { /* C4 */ + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <360>; + exit-latency-us = <531>; + min-residency-us = <3934>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; + }; + + GOLD_OFF: gold-c4 { /* C4 */ + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <702>; + exit-latency-us = <1061>; + min-residency-us = <4488>; + arm,psci-suspend-param = <0x40000004>; + local-timer-stop; + }; + + APSS_OFF: cluster-e3 { /* LLCC off, AOSS sleep */ + compatible = "domain-idle-state"; + idle-state-name = "llcc-off"; + entry-latency-us = <3263>; + exit-latency-us = <6562>; + min-residency-us = <9987>; + arm,psci-suspend-param = <0x4100c344>; + }; + }; + + soc: soc { + cpufreq_hw: qcom,cpufreq-hw { + compatible = "qcom,cpufreq-epss"; + reg = <0x18591000 0x1000>, <0x18592000 0x1000>, + <0x18593000 0x1000>; + reg-names = "freq-domain0", "freq-domain1", + "freq-domain2"; + + //clocks = <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GPLL0>; + //clock-names = "xo", "alternate"; + + qcom,lut-row-size = <4>; + qcom,skip-enable-check; + + #freq-domain-cells = <2>; + + cpu7_notify: cpu7-notify { + qcom,cooling-cpu = <&CPU7>; + #cooling-cells = <2>; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + firmware: firmware { + qcom_scm { + compatible = "qcom,scm"; + }; + + qtee_shmbridge { + compatible = "qcom,tee-shared-memory-bridge"; + }; + + android { + compatible = "android,firmware"; + vbmeta { + compatible = "android,vbmeta"; + parts = "vbmeta,boot,system,vendor,dtbo,recovery"; + }; + + fstab { + compatible = "android,fstab"; + vendor { + compatible = "android,vendor"; + dev = "/dev/block/platform/soc/1d84000.ufshc/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro,barrier=1,discard"; + fsmgr_flags = "wait,slotselect,avb"; + status = "ok"; + }; + }; + }; + }; +}; + +&reserved_memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hyp_mem: hyp_region@80000000 { + no-map; + reg = <0x0 0x80000000 0x0 0x600000>; + }; + + xbl_aop_mem: xbl_aop_region@80700000 { + no-map; + reg = <0x0 0x80700000 0x0 0x160000>; + }; + + cmd_db: reserved-memory@80860000 { + reg = <0x0 0x80860000 0x0 0x20000>; + compatible = "qcom,cmd-db"; + no-map; + }; + + smem_mem: smem_region@80900000 { + no-map; + reg = <0x0 0x80900000 0x0 0x200000>; + }; + + removed_mem: removed_region@80b00000 { + no-map; + reg = <0x0 0x80b00000 0x0 0x5300000>; + }; + + pil_camera_mem: pil_camera_region@86200000 { + no-map; + reg = <0x0 0x86200000 0x0 0x500000>; + }; + + pil_wlan_fw_mem: pil_wlan_fw_region@86700000 { + no-map; + reg = <0x0 0x86700000 0x0 0x100000>; + }; + + pil_ipa_fw_mem: pil_ipa_fw_region@86800000 { + no-map; + reg = <0x0 0x86800000 0x0 0x10000>; + }; + + pil_ipa_gsi_mem: pil_ipa_gsi_region@86810000 { + no-map; + reg = <0x0 0x86810000 0x0 0xa000>; + }; + + pil_gpu_mem: pil_gpu_region@8681a000 { + no-map; + reg = <0x0 0x8681a000 0x0 0x2000>; + }; + + pil_npu_mem: pil_npu_region@86900000 { + no-map; + reg = <0x0 0x86900000 0x0 0x500000>; + }; + + video_mem: video_region@86e00000 { + no-map; + reg = <0x0 0x86e00000 0x0 0x500000>; + }; + + pil_cvp_mem: pil_cvp_region@87300000 { + no-map; + reg = <0x0 0x87300000 0x0 0x500000>; + }; + + pil_cdsp_mem: pil_cdsp_region@87800000 { + no-map; + reg = <0x0 0x87800000 0x0 0x1400000>; + }; + + pil_slpi_mem: pil_slpi_region@88c00000 { + no-map; + reg = <0x0 0x88c00000 0x0 0x1500000>; + }; + + pil_adsp_mem: pil_adsp_region@8a100000 { + no-map; + reg = <0x0 0x8a100000 0x0 0x1d00000>; + }; + + pil_spss_mem: pil_spss_region@8be00000 { + no-map; + reg = <0x0 0x8be00000 0x0 0x100000>; + }; + + cdsp_secure_heap: cdsp_secure_heap@8bf00000 { + no-map; + reg = <0x0 0x8bf00000 0x0 0x4600000>; + }; + + adsp_mem: adsp_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0xC00000>; + }; + + sdsp_mem: sdsp_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x800000>; + }; + + cdsp_mem: cdsp_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x400000>; + }; + + cont_splash_memory: cont_splash_region@9c000000 { + reg = <0x0 0x9c000000 0x0 0x02300000>; + label = "cont_splash_region"; + }; + + disp_rdump_memory: disp_rdump_region@9c000000 { + reg = <0x0 0x9c000000 0x0 0x00800000>; + label = "disp_rdump_region"; + }; + + dfps_data_memory: dfps_data_region@9e300000 { + reg = <0x0 0x9e300000 0x0 0x0100000>; + label = "dfps_data_region"; + }; + + dump_mem: mem_dump_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + size = <0 0x2800000>; + }; + + sp_mem: sp_region { /* SPSS-HLOS ION shared mem */ + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1000000>; + }; + + user_contig_mem: user_contig_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1000000>; + }; + + qseecom_mem: qseecom_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1400000>; + }; + + qseecom_ta_mem: qseecom_ta_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1000000>; + }; + + secure_display_memory: secure_display_region { /* Secure UI */ + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0xA400000>; + }; + + cnss_wlan_mem: cnss_wlan_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1400000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x2000000>; + linux,cma-default; + }; + + mailbox_mem: mailbox_region { + compatible = "shared-dma-pool"; + no-map; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + alignment = <0x0 0x400000>; + size = <0x0 0x20000>; + }; +}; + +&soc { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + + intc: interrupt-controller@17a00000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + #redistributor-regions = <1>; + redistributor-stride = <0x0 0x20000>; + reg = <0x17a00000 0x10000>, /* GICD */ + <0x17a60000 0x100000>; /* GICR * 8 */ + interrupts = ; + }; + + arch_timer: timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + clock-frequency = <19200000>; + }; + + memtimer: timer@17c20000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0x17c20000 0x1000>; + clock-frequency = <19200000>; + + frame@17c21000 { + frame-number = <0>; + interrupts = , + ; + reg = <0x17c21000 0x1000>, + <0x17c22000 0x1000>; + }; + + frame@17c23000 { + frame-number = <1>; + interrupts = ; + reg = <0x17c23000 0x1000>; + status = "disabled"; + }; + + frame@17c25000 { + frame-number = <2>; + interrupts = ; + reg = <0x17c25000 0x1000>; + status = "disabled"; + }; + + frame@17c27000 { + frame-number = <3>; + interrupts = ; + reg = <0x17c27000 0x1000>; + status = "disabled"; + }; + + frame@17c29000 { + frame-number = <4>; + interrupts = ; + reg = <0x17c29000 0x1000>; + status = "disabled"; + }; + + frame@17c2b000 { + frame-number = <5>; + interrupts = ; + reg = <0x17c2b000 0x1000>; + status = "disabled"; + }; + + frame@17c2d000 { + frame-number = <6>; + interrupts = ; + reg = <0x17c2d000 0x1000>; + status = "disabled"; + }; + }; + + cpu_pmu: cpu-pmu { + compatible = "arm,armv8-pmuv3"; + qcom,irq-is-percpu; + interrupts = ; + }; + + pdc: interrupt-controller@b220000 { + compatible = "qcom,kona-pdc"; + reg = <0xb220000 0x30000>, <0x17c000f0 0x60>; + qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>, <126 716 12>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + + qcom,chd_silver { + compatible = "qcom,core-hang-detect"; + label = "silver"; + qcom,threshold-arr = <0x18000058 0x18010058 + 0x18020058 0x18030058>; + qcom,config-arr = <0x18000060 0x18010060 + 0x18020060 0x18030060>; + }; + + qcom,chd_gold { + compatible = "qcom,core-hang-detect"; + label = "gold"; + qcom,threshold-arr = <0x18040058 0x18050058 + 0x18060058 0x18070058>; + qcom,config-arr = <0x18040060 0x18050060 + 0x18060060 0x18070060>; + }; + + cache-controller@9200000 { + //compatible = "qcom,kona-llcc"; + reg = <0x9200000 0x1d0000> , <0x9600000 0x50000>; + reg-names = "llcc_base", "llcc_broadcast_base"; + cap-based-alloc-and-pwr-collapse; + }; + + wdog: qcom,wdt@17c10000 { + compatible = "qcom,msm-watchdog"; + reg = <0x17c10000 0x1000>; + reg-names = "wdt-base"; + interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, + <0 1 IRQ_TYPE_LEVEL_HIGH>; + qcom,bark-time = <11000>; + qcom,pet-time = <9360>; + qcom,wakeup-enable; + qcom,ipi-ping; + }; + + qcom,msm-imem@146bf000 { + compatible = "qcom,msm-imem"; + reg = <0x146bf000 0x1000>; + ranges = <0x0 0x146bf000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + mem_dump_table@10 { + compatible = "qcom,msm-imem-mem_dump_table"; + reg = <0x10 0x8>; + }; + + restart_reason@65c { + compatible = "qcom,msm-imem-restart_reason"; + reg = <0x65c 0x4>; + }; + + dload_type@1c { + compatible = "qcom,msm-imem-dload-type"; + reg = <0x1c 0x4>; + }; + + boot_stats@6b0 { + compatible = "qcom,msm-imem-boot_stats"; + reg = <0x6b0 0x20>; + }; + + kaslr_offset@6d0 { + compatible = "qcom,msm-imem-kaslr_offset"; + reg = <0x6d0 0xc>; + }; + + pil@94c { + compatible = "qcom,msm-imem-pil"; + reg = <0x94c 0xc8>; + }; + + diag_dload@c8 { + compatible = "qcom,msm-imem-diag-dload"; + reg = <0xc8 0xc8>; + }; + }; + + qcom,mpm2-sleep-counter@c221000 { + compatible = "qcom,mpm2-sleep-counter"; + reg = <0xc221000 0x1000>; + clock-frequency = <32768>; + }; + + qcom-secure-buffer { + compatible = "qcom,secure-buffer"; + }; + + mem_dump { + compatible = "qcom,mem-dump"; + memory-region = <&dump_mem>; + + c0_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x0>; + }; + + c100_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x1>; + }; + + c200_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x2>; + }; + + c300_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x3>; + }; + + c400_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x4>; + }; + + c500_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x5>; + }; + + c600_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x6>; + }; + + c700_context { + qcom,dump-size = <0x800>; + qcom,dump-id = <0x7>; + }; + + c0_scandump { + qcom,dump-size = <0x10100>; + qcom,dump-id = <0x130>; + }; + + c100_scandump { + qcom,dump-size = <0x10100>; + qcom,dump-id = <0x131>; + }; + + c200_scandump { + qcom,dump-size = <0x10100>; + qcom,dump-id = <0x132>; + }; + + c300_scandump { + qcom,dump-size = <0x10100>; + qcom,dump-id = <0x133>; + }; + + c400_scandump { + qcom,dump-size = <0x1a4c0>; + qcom,dump-id = <0x134>; + }; + + c500_scandump { + qcom,dump-size = <0x1a4c0>; + qcom,dump-id = <0x135>; + }; + + c600_scandump { + qcom,dump-size = <0x1a4c0>; + qcom,dump-id = <0x136>; + }; + + c700_scandump { + qcom,dump-size = <0x1a4c0>; + qcom,dump-id = <0x137>; + }; + + cpuss_reg { + qcom,dump-size = <0x30000>; + qcom,dump-id = <0xef>; + }; + + l1_icache0 { + qcom,dump-size = <0x10800>; + qcom,dump-id = <0x60>; + }; + + l1_icache100 { + qcom,dump-size = <0x10800>; + qcom,dump-id = <0x61>; + }; + + l1_icache200 { + qcom,dump-size = <0x10800>; + qcom,dump-id = <0x62>; + }; + + l1_icache300 { + qcom,dump-size = <0x10800>; + qcom,dump-id = <0x63>; + }; + + l1_icache400 { + qcom,dump-size = <0x26000>; + qcom,dump-id = <0x64>; + }; + + l1_icache500 { + qcom,dump-size = <0x26000>; + qcom,dump-id = <0x65>; + }; + + l1_icache600 { + qcom,dump-size = <0x26000>; + qcom,dump-id = <0x66>; + }; + + l1_icache700 { + qcom,dump-size = <0x26000>; + qcom,dump-id = <0x67>; + }; + + l1_dcache0 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x80>; + }; + + l1_dcache100 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x81>; + }; + + l1_dcache200 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x82>; + }; + + l1_dcache300 { + qcom,dump-size = <0x9000>; + qcom,dump-id = <0x83>; + }; + + l1_dcache400 { + qcom,dump-size = <0x1A000>; + qcom,dump-id = <0x84>; + }; + + l1_dcache500 { + qcom,dump-size = <0x1A000>; + qcom,dump-id = <0x85>; + }; + + l1_dcache600 { + qcom,dump-size = <0x1A000>; + qcom,dump-id = <0x86>; + }; + + l1_dcache700 { + qcom,dump-size = <0x1A000>; + qcom,dump-id = <0x87>; + }; + + l1_itlb400 { + qcom,dump-size = <0x300>; + qcom,dump-id = <0x24>; + }; + + l1_itlb500 { + qcom,dump-size = <0x300>; + qcom,dump-id = <0x25>; + }; + + l1_itlb600 { + qcom,dump-size = <0x300>; + qcom,dump-id = <0x26>; + }; + + l1_itlb700 { + qcom,dump-size = <0x300>; + qcom,dump-id = <0x27>; + }; + + l1_dtlb400 { + qcom,dump-size = <0x480>; + qcom,dump-id = <0x44>; + }; + + l1_dtlb500 { + qcom,dump-size = <0x480>; + qcom,dump-id = <0x45>; + }; + + l1_dtlb600 { + qcom,dump-size = <0x480>; + qcom,dump-id = <0x46>; + }; + + l1_dtlb700 { + qcom,dump-size = <0x480>; + qcom,dump-id = <0x47>; + }; + + l2_cache400 { + qcom,dump-size = <0x68000>; + qcom,dump-id = <0xc4>; + }; + + l2_cache500 { + qcom,dump-size = <0x68000>; + qcom,dump-id = <0xc5>; + }; + + l2_cache600 { + qcom,dump-size = <0x68000>; + qcom,dump-id = <0xc6>; + }; + + l2_cache700 { + qcom,dump-size = <0xD0000>; + qcom,dump-id = <0xc7>; + }; + + l2_tlb0 { + qcom,dump-size = <0x6000>; + qcom,dump-id = <0x120>; + }; + + l2_tlb100 { + qcom,dump-size = <0x6000>; + qcom,dump-id = <0x121>; + }; + + l2_tlb200 { + qcom,dump-size = <0x6000>; + qcom,dump-id = <0x122>; + }; + + l2_tlb300 { + qcom,dump-size = <0x6000>; + qcom,dump-id = <0x123>; + }; + + l2_tlb400 { + qcom,dump-size = <0x7800>; + qcom,dump-id = <0x124>; + }; + + l2_tlb500 { + qcom,dump-size = <0x7800>; + qcom,dump-id = <0x125>; + }; + + l2_tlb600 { + qcom,dump-size = <0x7800>; + qcom,dump-id = <0x126>; + }; + + l2_tlb700 { + qcom,dump-size = <0x7800>; + qcom,dump-id = <0x127>; + }; + + gemnoc { + qcom,dump-size = <0x100000>; + qcom,dump-id = <0x162>; + }; + + mhm_scan { + qcom,dump-size = <0x20000>; + qcom,dump-id = <0x161>; + }; + + rpmh { + qcom,dump-size = <0x2000000>; + qcom,dump-id = <0xec>; + }; + + rpm_sw { + qcom,dump-size = <0x28000>; + qcom,dump-id = <0xea>; + }; + + pmic { + qcom,dump-size = <0x80000>; + qcom,dump-id = <0xe4>; + }; + + fcm { + qcom,dump-size = <0x8400>; + qcom,dump-id = <0xee>; + }; + + etf_swao { + qcom,dump-size = <0x10000>; + qcom,dump-id = <0xf1>; + }; + + etr_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x100>; + }; + + etfswao_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x102>; + }; + + misc_data { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0xe8>; + }; + + etf_slpi { + qcom,dump-size = <0x4000>; + qcom,dump-id = <0xf3>; + }; + + etfslpi_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x103>; + }; + + etf_lpass { + qcom,dump-size = <0x4000>; + qcom,dump-id = <0xf4>; + }; + + etflpass_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x104>; + }; + }; + +}; + +#include "kona-pinctrl.dtsi"