diff --git a/bindings/arm/msm/msm.txt b/bindings/arm/msm/msm.txt
index 034aa366..e37c3714 100644
--- a/bindings/arm/msm/msm.txt
+++ b/bindings/arm/msm/msm.txt
@@ -107,6 +107,9 @@ SoCs:
 - SA410M
   compatible = "qcom,sa410m"
 
+- LEMANS
+  compatible = "qcom,lemans"
+
 - MONACO
   compatible = "qcom,monaco", "qcom,monacop"
 
@@ -321,3 +324,10 @@ compatible = "qcom,sdxbaagha-mtp"
 compatible = "qcom,sdxbaagha-cdp"
 compatible = "qcom,sa410m-idp"
 compatible = "qcom,sa410m-qrd"
+compatible = "qcom,lemans-rumi"
+compatible = "qcom,lemans-ivi"
+compatible = "qcom,lemans-ivi-adp-air"
+compatible = "qcom,lemans-ivi-adp-star"
+compatible = "qcom,lemans-adas-high"
+compatible = "qcom,lemans-adas-high-adp-air"
+compatible = "qcom,lemans-adas-high-adp-star"
diff --git a/qcom/Makefile b/qcom/Makefile
index f892d195..247431d9 100644
--- a/qcom/Makefile
+++ b/qcom/Makefile
@@ -150,9 +150,30 @@ sdmsteppeauto-overlays-dtb-$(CONFIG_ARCH_SA6155) += $(SA6155_BOARDS) $(SA6155P_B
 
 dtb-y += $(sdmsteppeauto-dtb-y)
 
+LEMANS_BASE_DTB		+= lemans.dtb
+LEMANS_IVI_BASE_DTB	+= lemans-ivi.dtb
+LEMANS_ADAS_HIGH_BASE_DTB += lemans-adas-high.dtb
+
+LEMANS_BOARDS		+= lemans-rumi-overlay.dtbo
+LEMANS_IVI_BOARDS	+= lemans-ivi-adp-air-overlay.dtbo \
+			   lemans-ivi-adp-star-overlay.dtbo
+LEMANS_ADAS_HIGH_BOARDS += lemans-adas-high-adp-air-overlay.dtbo \
+			   lemans-adas-high-adp-star-overlay.dtbo
+
+gen4auto-dtb-$(CONFIG_ARCH_LEMANS) += \
+	$(call add-overlays, $(LEMANS_IVI_BOARDS),$(LEMANS_IVI_BASE_DTB))\
+	$(call add-overlays, $(LEMANS_ADAS_HIGH_BOARDS),$(LEMANS_ADAS_HIGH_BASE_DTB))
+
+gen4auto-overlays-dtb-$(CONFIG_ARCH_LEMANS) +=  \
+	$(LEMANS_IVI_BOARDS) $(LEMANS_ADAS_HIGH_BOARDS) $(LEMANS_IVI_BASE_DTB) $(LEMANS_ADAS_HIGH_BASE_DTB)
+
+dtb-y += $(gen4auto-dtb-y)
+
 sdxpinn-dtb-$(CONFIG_ARCH_SDXPINN) += sdxpinn-rumi.dtb sa525m-rumi.dtb \
                  sdxpinn-mtp.dtb \
                  sdxpinn-cdp.dtb
+
+sdxpinn-dtb-$(CONFIG_ARCH_SDXPINN) += sdxpinn-rumi.dtb sa525m-rumi.dtb
 dtb-y += $(sdxpinn-dtb-y)
 
 sa410m_auto-dtb-$(CONFIG_ARCH_SA410M) += \
diff --git a/qcom/lemans-adas-high-adp-air-overlay.dts b/qcom/lemans-adas-high-adp-air-overlay.dts
new file mode 100644
index 00000000..2cecf4c0
--- /dev/null
+++ b/qcom/lemans-adas-high-adp-air-overlay.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+/plugin/;
+
+#include "lemans-adp-air.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans ADAS HIGH ADP AIR";
+	compatible = "qcom,lemans", "qcom,adp-air", "qcom,lemans-adas-high", "qcom,lemans-adas-high-adp-air";
+	qcom,msm-id = <533 0x10000>;
+	qcom,board-id = <0x1010019 0>;
+};
diff --git a/qcom/lemans-adas-high-adp-star-overlay.dts b/qcom/lemans-adas-high-adp-star-overlay.dts
new file mode 100644
index 00000000..a01fa06e
--- /dev/null
+++ b/qcom/lemans-adas-high-adp-star-overlay.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+/plugin/;
+
+#include "lemans-adp-star.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans ADAS HIGH ADP STAR";
+	compatible = "qcom,lemans", "qcom,adp-star", "qcom,lemans-adas-high", "qcom,lemans-adas-high-adp-star";
+	qcom,msm-id = <533 0x10000>;
+	qcom,board-id = <0x10019 0>;
+};
diff --git a/qcom/lemans-adas-high.dts b/qcom/lemans-adas-high.dts
new file mode 100644
index 00000000..b32109da
--- /dev/null
+++ b/qcom/lemans-adas-high.dts
@@ -0,0 +1,9 @@
+/dts-v1/;
+
+#include "lemans-adas-high.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans ADAS HIGH SoC";
+	compatible = "qcom,lemans", "qcom,lemans-adas-high";
+	qcom,board-id = <0 0>;
+};
diff --git a/qcom/lemans-adas-high.dtsi b/qcom/lemans-adas-high.dtsi
new file mode 100644
index 00000000..6f9db8b2
--- /dev/null
+++ b/qcom/lemans-adas-high.dtsi
@@ -0,0 +1,7 @@
+#include "lemans.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. LeMans ADAS HIGH SoC";
+	compatible = "qcom,lemans", "qcom,lemans-adas-high";
+	qcom,msm-id = <533 0x10000>;
+};
diff --git a/qcom/lemans-adp-air.dtsi b/qcom/lemans-adp-air.dtsi
new file mode 100644
index 00000000..689bf563
--- /dev/null
+++ b/qcom/lemans-adp-air.dtsi
@@ -0,0 +1 @@
+#include  "lemans-adp-common.dtsi"
diff --git a/qcom/lemans-adp-common.dtsi b/qcom/lemans-adp-common.dtsi
new file mode 100644
index 00000000..f82eb484
--- /dev/null
+++ b/qcom/lemans-adp-common.dtsi
@@ -0,0 +1,8 @@
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans ADP";
+	compatible =  "qcom,lemans", "qcom,adp";
+	qcom,board-id = <25 0>;
+};
+
+&soc {
+};
diff --git a/qcom/lemans-adp-star.dtsi b/qcom/lemans-adp-star.dtsi
new file mode 100644
index 00000000..689bf563
--- /dev/null
+++ b/qcom/lemans-adp-star.dtsi
@@ -0,0 +1 @@
+#include  "lemans-adp-common.dtsi"
diff --git a/qcom/lemans-ivi-adp-air-overlay.dts b/qcom/lemans-ivi-adp-air-overlay.dts
new file mode 100644
index 00000000..73994cca
--- /dev/null
+++ b/qcom/lemans-ivi-adp-air-overlay.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+/plugin/;
+
+#include "lemans-adp-air.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans IVI ADP AIR";
+	compatible = "qcom,lemans", "qcom,adp-air", "qcom,lemans-ivi", "qcom,lemans-ivi-adp-air";
+	qcom,msm-id = <532 0x10000>;
+	qcom,board-id = <0x1010019 0>;
+};
diff --git a/qcom/lemans-ivi-adp-star-overlay.dts b/qcom/lemans-ivi-adp-star-overlay.dts
new file mode 100644
index 00000000..0be40da4
--- /dev/null
+++ b/qcom/lemans-ivi-adp-star-overlay.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+/plugin/;
+
+#include "lemans-adp-star.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans IVI ADP STAR";
+	compatible = "qcom,lemans", "qcom,adp-star", "qcom,lemans-ivi", "qcom,lemans-ivi-adp-star";
+	qcom,msm-id = <532 0x10000>;
+	qcom,board-id = <0x10019 0>;
+};
diff --git a/qcom/lemans-ivi.dts b/qcom/lemans-ivi.dts
new file mode 100644
index 00000000..a0b78e9a
--- /dev/null
+++ b/qcom/lemans-ivi.dts
@@ -0,0 +1,8 @@
+/dts-v1/;
+
+#include "lemans-ivi.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans IVI SoC";
+	compatible = "qcom,lemans", "qcom,lemans-ivi";
+	qcom,board-id = <0 0>;
+};
diff --git a/qcom/lemans-ivi.dtsi b/qcom/lemans-ivi.dtsi
new file mode 100644
index 00000000..69752f67
--- /dev/null
+++ b/qcom/lemans-ivi.dtsi
@@ -0,0 +1,7 @@
+#include "lemans.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. LeMans IVI SoC";
+	compatible = "qcom,lemans", "qcom,lemans-ivi";
+	qcom,msm-id = <532 0x10000>;
+};
diff --git a/qcom/lemans-rumi-overlay.dts b/qcom/lemans-rumi-overlay.dts
new file mode 100644
index 00000000..ba3ef013
--- /dev/null
+++ b/qcom/lemans-rumi-overlay.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+/plugin/;
+
+#include "lemans-rumi.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans RUMI";
+	compatible = "qcom,lemans", "qcom,rumi", "qcom,lemans-rumi";
+	qcom,board-id = <0x1000F 0>;
+};
diff --git a/qcom/lemans-rumi.dtsi b/qcom/lemans-rumi.dtsi
new file mode 100644
index 00000000..ed634a58
--- /dev/null
+++ b/qcom/lemans-rumi.dtsi
@@ -0,0 +1,11 @@
+
+&arch_timer {
+	clock-frequency = <500000>;
+};
+
+&memtimer {
+	clock-frequency = <500000>;
+};
+
+&soc {
+};
diff --git a/qcom/lemans.dts b/qcom/lemans.dts
new file mode 100644
index 00000000..1c13ba73
--- /dev/null
+++ b/qcom/lemans.dts
@@ -0,0 +1,8 @@
+/dts-v1/;
+
+#include "lemans.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans SoC";
+	compatible = "qcom,lemans";
+	qcom,board-id = <0 0>;
+};
diff --git a/qcom/lemans.dtsi b/qcom/lemans.dtsi
new file mode 100644
index 00000000..1cbdab90
--- /dev/null
+++ b/qcom/lemans.dtsi
@@ -0,0 +1,303 @@
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	model = "Qualcomm Technologies, Inc. Lemans";
+	compatible = "qcom,lemans";
+	qcom,msm-id = <532 0x10000>;
+	interrupt-parent = <&intc>;
+
+	#address-cells = <2>;
+	#size-cells = <2>;
+	memory { device_type = "memory"; reg = <0 0 0 0>; };
+
+	chosen: chosen { };
+
+	aliases { };
+
+	soc: soc { };
+
+	firmware: firmware { };
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		CPU0: cpu@0 {
+			device_type = "cpu";
+			compatible = "qcom,kryo";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+			cpu-release-addr = <0x0 0x90000000>;
+			cache-size = <0x20000>;
+			next-level-cache = <&L2_0>;
+			L2_0: l2-cache {
+			      compatible = "arm,arch-cache";
+			      cache-level = <2>;
+			      cache-size = <0x80000>;
+			      next-level-cache = <&L3_0>;
+
+				L3_0: l3-cache {
+				      compatible = "arm,arch-cache";
+				      cache-level = <3>;
+				      cache-size = <0x200000>;
+				};
+			};
+		};
+
+		CPU1: cpu@100 {
+			device_type = "cpu";
+			compatible = "qcom,kryo";
+			reg = <0x0 0x100>;
+			enable-method = "psci";
+			cpu-release-addr = <0x0 0x90000000>;
+			cache-size = <0x20000>;
+			next-level-cache = <&L2_1>;
+			L2_1: l2-cache {
+			      compatible = "arm,arch-cache";
+			      cache-level = <2>;
+			      cache-size = <0x80000>;
+			      next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU2: cpu@200 {
+			device_type = "cpu";
+			compatible = "qcom,kryo";
+			reg = <0x0 0x200>;
+			enable-method = "psci";
+			cpu-release-addr = <0x0 0x90000000>;
+			cache-size = <0x20000>;
+			next-level-cache = <&L2_2>;
+			L2_2: l2-cache {
+			      compatible = "arm,arch-cache";
+			      cache-level = <2>;
+			      cache-size = <0x80000>;
+			      next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU3: cpu@300 {
+			device_type = "cpu";
+			compatible = "qcom,kryo";
+			reg = <0x0 0x300>;
+			enable-method = "psci";
+			cpu-release-addr = <0x0 0x90000000>;
+			cache-size = <0x20000>;
+			next-level-cache = <&L2_3>;
+			L2_3: l2-cache {
+			      compatible = "arm,arch-cache";
+			      cache-level = <2>;
+			      cache-size = <0x80000>;
+			      next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU4: cpu@10000 {
+			device_type = "cpu";
+			compatible = "qcom,kryo";
+			reg = <0x0 0x10000>;
+			enable-method = "psci";
+			cache-size = <0x20000>;
+			cpu-release-addr = <0x0 0x90000000>;
+			next-level-cache = <&L2_4>;
+			L2_4: l2-cache {
+			      compatible = "arm,arch-cache";
+			      cache-level = <2>;
+			      cache-size = <0x80000>;
+			      next-level-cache = <&L3_1>;
+				L3_1: l3-cache {
+				      compatible = "arm,arch-cache";
+				      cache-level = <3>;
+				      cache-size = <0x200000>;
+				};
+
+			};
+		};
+
+		CPU5: cpu@10100 {
+			device_type = "cpu";
+			compatible = "qcom,kryo";
+			reg = <0x0 0x10100>;
+			enable-method = "psci";
+			cpu-release-addr = <0x0 0x90000000>;
+			cache-size = <0x20000>;
+			next-level-cache = <&L2_5>;
+			L2_5: l2-cache {
+			      compatible = "arm,arch-cache";
+			      cache-level = <2>;
+			      cache-size = <0x80000>;
+			      next-level-cache = <&L3_1>;
+			};
+		};
+
+		CPU6: cpu@10200 {
+			device_type = "cpu";
+			compatible = "qcom,kryo";
+			reg = <0x0 0x10200>;
+			enable-method = "psci";
+			cpu-release-addr = <0x0 0x90000000>;
+			cache-size = <0x20000>;
+			next-level-cache = <&L2_6>;
+			L2_6: l2-cache {
+			      compatible = "arm,arch-cache";
+			      cache-level = <2>;
+			      cache-size = <0x80000>;
+			      next-level-cache = <&L3_1>;
+			};
+		};
+
+		CPU7: cpu@10300 {
+			device_type = "cpu";
+			compatible = "qcom,kryo";
+			reg = <0x0 0x10300>;
+			enable-method = "psci";
+			cpu-release-addr = <0x0 0x90000000>;
+			cache-size = <0x20000>;
+			next-level-cache = <&L2_7>;
+			L2_7: l2-cache {
+			      compatible = "arm,arch-cache";
+			      cache-level = <2>;
+			      cache-size = <0x80000>;
+			      next-level-cache = <&L3_1>;
+			};
+		};
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&CPU0>;
+				};
+
+				core1 {
+					cpu = <&CPU1>;
+				};
+
+				core2 {
+					cpu = <&CPU2>;
+				};
+
+				core3 {
+					cpu = <&CPU3>;
+				};
+			};
+
+			cluster1 {
+				core0 {
+					cpu = <&CPU4>;
+				};
+
+				core1 {
+					cpu = <&CPU5>;
+				};
+
+				core2 {
+					cpu = <&CPU6>;
+				};
+
+				core3 {
+					cpu = <&CPU7>;
+				};
+			};
+		};
+	};
+};
+
+&firmware {
+	scm {
+		compatible = "qcom,scm";
+	};
+};
+
+&soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges = <0 0 0 0xffffffff>;
+	compatible = "simple-bus";
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	intc: interrupt-controller@17a00000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <3>;
+		interrupt-controller;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		#redistributor-regions = <1>;
+		redistributor-stride = <0x0 0x20000>;
+		reg = <0x17a00000 0x10000>,     /* GICD */
+		      <0x17a60000 0x100000>;    /* GICR * 8 */
+		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	arch_timer: timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+		clock-frequency = <19200000>;
+	};
+
+	memtimer: timer@17c20000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "arm,armv7-timer-mem";
+		reg = <0x17c20000 0x1000>;
+		clock-frequency = <19200000>;
+
+		frame@17c21000 {
+			frame-number = <0>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x17c21000 0x1000>,
+			      <0x17c22000 0x1000>;
+		};
+
+		frame@17c23000 {
+			frame-number = <1>;
+			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x17c23000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@17c25000 {
+			frame-number = <2>;
+			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x17c25000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@17c27000 {
+			frame-number = <3>;
+			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x17c27000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@17c29000 {
+			frame-number = <4>;
+			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x17c29000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@17c2b000 {
+			frame-number = <5>;
+			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x17c2b000 0x1000>;
+			status = "disabled";
+		};
+
+		frame@17c2d000 {
+			frame-number = <6>;
+			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x17c2d000 0x1000>;
+			status = "disabled";
+		};
+	};
+};