From 8f3535b6b32f13043602370ee5734ce3171adb85 Mon Sep 17 00:00:00 2001 From: Krishnaiah Tadakamalla Date: Tue, 25 Oct 2022 06:16:47 -0700 Subject: [PATCH] ARM: dts: msm: Increase IOVA size for CB Increased IOVA size for aDSP and cDSP SMMU context banks. Change-Id: I9752862a541bba536b789075d503bd4438c1dade --- qcom/kalama.dtsi | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/qcom/kalama.dtsi b/qcom/kalama.dtsi index 016076af..d54506c5 100644 --- a/qcom/kalama.dtsi +++ b/qcom/kalama.dtsi @@ -2713,7 +2713,7 @@ iommus = <&apps_smmu 0x1961 0x0000>, <&apps_smmu 0x0C01 0x0020>, <&apps_smmu 0x19C1 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2724,7 +2724,7 @@ iommus = <&apps_smmu 0x1962 0x0000>, <&apps_smmu 0x0C02 0x0020>, <&apps_smmu 0x19C2 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2735,7 +2735,7 @@ iommus = <&apps_smmu 0x1963 0x0000>, <&apps_smmu 0x0C03 0x0020>, <&apps_smmu 0x19C3 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2746,7 +2746,7 @@ iommus = <&apps_smmu 0x1964 0x0000>, <&apps_smmu 0x0C04 0x0020>, <&apps_smmu 0x19C4 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2757,7 +2757,7 @@ iommus = <&apps_smmu 0x1965 0x0000>, <&apps_smmu 0x0C05 0x0020>, <&apps_smmu 0x19C5 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2768,7 +2768,7 @@ iommus = <&apps_smmu 0x1966 0x0000>, <&apps_smmu 0x0C06 0x0020>, <&apps_smmu 0x19C6 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2779,7 +2779,7 @@ iommus = <&apps_smmu 0x1967 0x0000>, <&apps_smmu 0x0C07 0x0020>, <&apps_smmu 0x19C7 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2790,7 +2790,7 @@ iommus = <&apps_smmu 0x1968 0x0000>, <&apps_smmu 0x0C08 0x0020>, <&apps_smmu 0x19C8 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2802,7 +2802,7 @@ iommus = <&apps_smmu 0x1969 0x0000>, <&apps_smmu 0x0C09 0x0020>, <&apps_smmu 0x19C9 0x0010>; - qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x40000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ dma-coherent; @@ -2813,7 +2813,7 @@ label = "adsprpc-smd"; iommus = <&apps_smmu 0x1003 0x0080>, <&apps_smmu 0x1063 0x0000>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2823,7 +2823,7 @@ label = "adsprpc-smd"; iommus = <&apps_smmu 0x1004 0x0080>, <&apps_smmu 0x1064 0x0000>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2833,7 +2833,7 @@ label = "adsprpc-smd"; iommus = <&apps_smmu 0x1005 0x0080>, <&apps_smmu 0x1065 0x0000>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; shared-cb = <8>; dma-coherent; @@ -2844,7 +2844,7 @@ label = "adsprpc-smd"; iommus = <&apps_smmu 0x1006 0x0080>, <&apps_smmu 0x1066 0x0000>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2854,7 +2854,7 @@ label = "adsprpc-smd"; iommus = <&apps_smmu 0x1007 0x0080>, <&apps_smmu 0x1067 0x0000>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2865,7 +2865,7 @@ iommus = <&apps_smmu 0x196C 0x0000>, <&apps_smmu 0x0C0C 0x0020>, <&apps_smmu 0x19CC 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2876,7 +2876,7 @@ iommus = <&apps_smmu 0x196D 0x0000>, <&apps_smmu 0x0C0D 0x0020>, <&apps_smmu 0x19CD 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2887,7 +2887,7 @@ iommus = <&apps_smmu 0x196E 0x0000>, <&apps_smmu 0x0C0E 0x0020>, <&apps_smmu 0x19CE 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; }; @@ -2898,7 +2898,7 @@ iommus = <&apps_smmu 0x196F 0x0000>, <&apps_smmu 0x0C0F 0x0020>, <&apps_smmu 0x19CF 0x0010>; - qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-dma-addr-pool = <0x60000000 0x98000000>; qcom,iommu-faults = "stall-disable", "HUPCF"; dma-coherent; };