From d53436e83b968e0740a7b48ad818babc0dbf0afd Mon Sep 17 00:00:00 2001
From: Sayan Dey <sayand@qti.qualcomm.com>
Date: Thu, 17 Mar 2022 11:49:31 +0530
Subject: [PATCH] ARM: dts: msm: Add ipcc node for sdxpinn

Add ipcc node for sdxpinn to enable
inter processor communications.

Change-Id: I517420b1178b15bc979972d11ddbec05dad67a20
---
 qcom/sdxpinn.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/qcom/sdxpinn.dtsi b/qcom/sdxpinn.dtsi
index fae65858..f5adda68 100644
--- a/qcom/sdxpinn.dtsi
+++ b/qcom/sdxpinn.dtsi
@@ -361,6 +361,15 @@
 		interrupt-controller;
 		#interrupt-cells = <2>;
 	};
+
+	ipcc_mproc: qcom,ipcc@408000 {
+		compatible = "qcom,ipcc";
+		reg = <0x408000 0x1000>;
+		interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		#mbox-cells = <2>;
+	};
 };
 
 #include "sdxpinn-regulators.dtsi"