From ab7084266420ea97e6707dc14f656b2837287900 Mon Sep 17 00:00:00 2001
From: Sarthak Garg <sartgarg@qti.qualcomm.com>
Date: Fri, 23 Sep 2022 11:14:22 +0530
Subject: [PATCH] ARM: dts: msm: Add smmu and bus voting support for sdxpinn
 nand

Add smmu & bus voting support for sdxpinn nand.

Change-Id: I53ca32ab4b06a8b673070778ac6aa9369abb2934
---
 qcom/sdxpinn.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/qcom/sdxpinn.dtsi b/qcom/sdxpinn.dtsi
index 208f4f3f..fc2cef49 100644
--- a/qcom/sdxpinn.dtsi
+++ b/qcom/sdxpinn.dtsi
@@ -780,6 +780,19 @@
 		clock-names = "core_clk";
 		clocks = <&rpmhcc RPMH_QPIC_CLK>;
 
+		interconnects = <&system_noc MASTER_QPIC &mc_virt SLAVE_EBI1>;
+		interconnect-names = "nand-ddr";
+		qcom,msm-bus,name = "qpic_nand";
+		qcom,msm-bus,num-cases = <2>;
+		qcom,msm-bus,num-paths = <1>;
+		qcom,msm-bus,vectors-KBps =
+			<0 0>,
+		/* Voting for max b/w on PNOC bus for now */
+			<1057800 725760>;
+
+		iommus = <&apps_smmu 0x100 0x7>;
+		qcom,iommu-dma = "bypass";
+
 		status = "disabled";
 	};