From e4059975df6fa0ac5b5a76a381ea15903bc74348 Mon Sep 17 00:00:00 2001
From: Lijuan Gao <lijuang@qti.qualcomm.com>
Date: Wed, 21 Sep 2022 19:03:45 +0800
Subject: [PATCH] ARM: dts: msm: Correct the tlmm register base

Correct the tlmm register base of sdxbaagha soc.

Change-Id: I3d15557343f060fdbdb602cbfb08e28c820f6776
---
 qcom/sdxbaagha-pinctrl.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/sdxbaagha-pinctrl.dtsi b/qcom/sdxbaagha-pinctrl.dtsi
index 57eb8cd1..266f8208 100644
--- a/qcom/sdxbaagha-pinctrl.dtsi
+++ b/qcom/sdxbaagha-pinctrl.dtsi
@@ -1,7 +1,7 @@
 &soc {
 	tlmm: pinctrl@f100000 {
 		compatible = "qcom,sdxbaagha-pinctrl";
-		reg = <0xf100000 0x300000>;
+		reg = <0xf000000 0x300000>;
 		interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
 		gpio-controller;
 		#gpio-cells = <2>;