diff --git a/qcom/lemans-adp-common.dtsi b/qcom/lemans-adp-common.dtsi index f82eb484..3316447c 100644 --- a/qcom/lemans-adp-common.dtsi +++ b/qcom/lemans-adp-common.dtsi @@ -1,3 +1,5 @@ +#include "lemans-pmic-overlay.dtsi" + / { model = "Qualcomm Technologies, Inc. Lemans ADP"; compatible = "qcom,lemans", "qcom,adp"; diff --git a/qcom/lemans-pmic-overlay.dtsi b/qcom/lemans-pmic-overlay.dtsi new file mode 100644 index 00000000..18ffd3dd --- /dev/null +++ b/qcom/lemans-pmic-overlay.dtsi @@ -0,0 +1,211 @@ +#include "pm8775.dtsi" + +&pm8775_1 { + /delete-node/ pon_pbs@800; + /delete-node/ pon_hlos@1200; + + pon_hlos@1200 { + compatible = "qcom,pm8998-pon"; + reg = <0x1200>, <0x800>; + reg-names = "pon_hlos", "pon_pbs"; + + pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + }; + + resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + }; + }; +}; + +&pm8775_2 { + /delete-node/ pon_pbs@800; + /delete-node/ pon_hlos@1200; + + pon_hlos@1200 { + compatible = "qcom,pm8998-pon"; + reg = <0x1200>, <0x800>; + reg-names = "pon_hlos", "pon_pbs"; + + pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x2 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + }; + + resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x2 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + }; + }; +}; + +&pm8775_3 { + /delete-node/ pon_pbs@800; + /delete-node/ pon_hlos@1200; + + pon_hlos@1200 { + compatible = "qcom,pm8998-pon"; + reg = <0x1200>, <0x800>; + reg-names = "pon_hlos", "pon_pbs"; + + pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x4 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + }; + + resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x4 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + }; + }; +}; + +&pm8775_4 { + /delete-node/ pon_pbs@800; + /delete-node/ pon_hlos@1200; + + pon_hlos@1200 { + compatible = "qcom,pm8998-pon"; + reg = <0x1200>, <0x800>; + reg-names = "pon_hlos", "pon_pbs"; + + pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x6 0x12 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + }; + + resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x6 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + linux,code = ; + }; + }; +}; + +&soc { + pmic-pon-log { + compatible = "qcom,pmic-pon-log"; + nvmem = <&pm8775_1_sdam_5>; + nvmem-names = "pon_log"; + }; +}; + +&thermal_zones { + pm8775_1_temp_alarm: pm8775_1_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8775_1_tz>; + + trips { + pm8775_1_trip0: trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8775_1_trip1: trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8775_1_trip2: trip2 { + temperature = <155000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8775_2_temp_alarm: pm8775_2_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8775_2_tz>; + + trips { + pm8775_2_trip0: trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8775_2_trip1: trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8775_2_trip2: trip2 { + temperature = <155000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8775_3_temp_alarm: pm8775_3_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8775_3_tz>; + + trips { + pm8775_3_trip0: trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8775_3_trip1: trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8775_3_trip2: trip2 { + temperature = <155000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + + pm8775_4_temp_alarm: pm8775_4_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8775_4_tz>; + + trips { + pm8775_4_trip0: trip0 { + temperature = <105000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8775_4_trip1: trip1 { + temperature = <125000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8775_4_trip2: trip2 { + temperature = <155000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; +}; diff --git a/qcom/lemans.dtsi b/qcom/lemans.dtsi index 2b0b079f..03ba45cc 100644 --- a/qcom/lemans.dtsi +++ b/qcom/lemans.dtsi @@ -957,6 +957,28 @@ vendor_hooks: qcom,cpu-vendor-hooks { compatible = "qcom,cpu-vendor-hooks"; }; + + spmi_bus: qcom,spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0xc440000 0x1100>, + <0xc600000 0x2000000>, + <0xe600000 0x100000>, + <0xe700000 0xa0000>, + <0xc40a000 0x26000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <0>; + cell-index = <0>; + qcom,channel = <0>; + qcom,ee = <0>; + }; + + thermal_zones: thermal-zones { + }; }; #include "lemans-4pmic-regulators.dtsi" diff --git a/qcom/pm8775.dtsi b/qcom/pm8775.dtsi new file mode 100644 index 00000000..8f6caf84 --- /dev/null +++ b/qcom/pm8775.dtsi @@ -0,0 +1,233 @@ +#include +#include +#include +#include +#include + + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + pm8775_1: qcom,pm8775@0 { + compatible = "qcom,spmi-pmic"; + reg = <0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8775_1_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x0 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pon_pbs@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + qcom,system-reset; + qcom,store-hard-reset-reason; + }; + + pon_hlos@1200 { + compatible = "qcom,qpnp-power-on"; + reg = <0x1200>, <0x800>; + reg-names = "pon_hlos", "pon_pbs"; + interrupts = <0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "kpdpwr", "resin"; + qcom,kpdpwr-sw-debounce; + + qcom,pon_1 { + qcom,pon-type = ; + linux,code = ; + }; + + qcom,pon_2 { + qcom,pon-type = ; + linux,code = ; + }; + }; + + pm8775_1_clkdiv: clock-controller@5700 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5700>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8775_1_div_clk1", + "pm8775_1_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + }; + + pm8775_1_rtc: qcom,pm8775_1_rtc { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_NONE>; + }; + + pm8775_1_gpios: pinctrl@8800 { + compatible = "qcom,pm8775-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pm8775_1_sdam_2: sdam@7100 { + compatible = "qcom,spmi-sdam"; + reg = <0x7100>; + #address-cells = <1>; + #size-cells = <1>; + }; + + pm8775_1_sdam_5: sdam@7400 { + compatible = "qcom,spmi-sdam"; + reg = <0x7400>; + #address-cells = <1>; + #size-cells = <1>; + }; + }; + + /* below definitions are for the second instance of pm8775 */ + pm8775_2: qcom,pm8775@2 { + compatible = "qcom,spmi-pmic"; + reg = <2 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8775_2_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pon_pbs@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + }; + + pon_hlos@1200 { + compatible = "qcom,qpnp-power-on"; + reg = <0x1200>, <0x800>; + reg-names = "pon_hlos", "pon_pbs"; + }; + + pm8775_2_clkdiv: clock-controller@5700 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5700>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8775_2_div_clk1", + "pm8775_2_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + }; + + pm8775_2_gpios: pinctrl@8800 { + compatible = "qcom,pm8775-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + /* below definitions are for the third instance of pm8775 */ + pm8775_3: qcom,pm8775@4 { + compatible = "qcom,spmi-pmic"; + reg = <4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8775_3_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pon_pbs@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + }; + + pon_hlos@1200 { + compatible = "qcom,qpnp-power-on"; + reg = <0x1200>, <0x800>; + reg-names = "pon_hlos", "pon_pbs"; + }; + + pm8775_3_clkdiv: clock-controller@5700 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5700>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8775_3_div_clk1", + "pm8775_3_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + }; + + pm8775_3_gpios: pinctrl@8800 { + compatible = "qcom,pm8775-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + /* below definitions are for the fourth instance of pm8775 */ + pm8775_4: qcom,pm8775@6 { + compatible = "qcom,spmi-pmic"; + reg = <6 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8775_4_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pon_pbs@800 { + compatible = "qcom,qpnp-power-on"; + reg = <0x800>; + }; + + pon_hlos@1200 { + compatible = "qcom,qpnp-power-on"; + reg = <0x1200>, <0x800>; + reg-names = "pon_hlos", "pon_pbs"; + }; + + pm8775_4_clkdiv: clock-controller@5700 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5700>; + #clock-cells = <1>; + qcom,num-clkdivs = <2>; + clock-output-names = "pm8775_4_div_clk1", + "pm8775_4_div_clk2"; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + }; + + pm8775_4_gpios: pinctrl@8800 { + compatible = "qcom,pm8775-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +};