From f2b675c450526351cb8a2fffafa84f58a7a6e6a2 Mon Sep 17 00:00:00 2001 From: Vivek Aknurwar Date: Mon, 7 Mar 2022 19:07:38 -0800 Subject: [PATCH] ARM: dts: msm: Enable cfg-gdscr propterty for all gdscs Enable qcom,support-cfg-gdscr property for all gdscs which polls for gdscs power up/down status instead of PWR_ON status in gdscr register. Change-Id: Ia2077a7225e2390324461d8015e140dceac03e69 --- qcom/kalama.dtsi | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/qcom/kalama.dtsi b/qcom/kalama.dtsi index 0bc171c2..60bb0974 100644 --- a/qcom/kalama.dtsi +++ b/qcom/kalama.dtsi @@ -1674,6 +1674,7 @@ qcom,gds-timeout = <500>; qcom,support-hw-trigger; qcom,retain-regs; + qcom,support-cfg-gdscr; }; cam_cc_ife_0_gdsc: qcom,gdsc@adf1004 { @@ -1685,6 +1686,7 @@ parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; cam_cc_ife_1_gdsc: qcom,gdsc@adf2004 { @@ -1696,6 +1698,7 @@ parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; cam_cc_ife_2_gdsc: qcom,gdsc@adf2294 { @@ -1707,6 +1710,7 @@ parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; cam_cc_ipe_0_gdsc: qcom,gdsc@adf03b8 { @@ -1719,6 +1723,7 @@ qcom,gds-timeout = <500>; qcom,support-hw-trigger; qcom,retain-regs; + qcom,support-cfg-gdscr; }; cam_cc_sbi_gdsc: qcom,gdsc@adf052c { @@ -1730,6 +1735,7 @@ parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; cam_cc_sfe_0_gdsc: qcom,gdsc@adf3280 { @@ -1741,6 +1747,7 @@ parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; cam_cc_sfe_1_gdsc: qcom,gdsc@adf33e0 { @@ -1752,6 +1759,7 @@ parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; cam_cc_titan_top_gdsc: qcom,gdsc@adf4058 { @@ -1765,6 +1773,7 @@ qcom,gds-timeout = <500>; qcom,proxy-consumer-enable; qcom,retain-regs; + qcom,support-cfg-gdscr; }; /* DISP_CC GDSCs */ @@ -1780,6 +1789,7 @@ qcom,proxy-consumer-enable; qcom,support-hw-trigger; qcom,retain-regs; + qcom,support-cfg-gdscr; }; disp_cc_mdss_core_int2_gdsc: qcom,gdsc@af0b000 { @@ -1792,6 +1802,7 @@ qcom,gds-timeout = <500>; qcom,support-hw-trigger; qcom,retain-regs; + qcom,support-cfg-gdscr; }; gcc_apcs_gdsc_vote_ctrl: syscon@152020{ @@ -1810,6 +1821,7 @@ qcom,retain-regs; qcom,no-status-check-on-disable; qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 0>; + qcom,support-cfg-gdscr; }; gcc_pcie_0_phy_gdsc: qcom,gdsc@16c000 { @@ -1822,6 +1834,7 @@ qcom,retain-regs; qcom,no-status-check-on-disable; qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 3>; + qcom,support-cfg-gdscr; }; gcc_pcie_1_gdsc: qcom,gdsc@18d004 { @@ -1834,6 +1847,7 @@ qcom,retain-regs; qcom,no-status-check-on-disable; qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 1>; + qcom,support-cfg-gdscr; }; gcc_pcie_1_phy_gdsc: qcom,gdsc@18e000 { @@ -1846,6 +1860,7 @@ qcom,retain-regs; qcom,no-status-check-on-disable; qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 4>; + qcom,support-cfg-gdscr; }; gcc_ufs_mem_phy_gdsc: qcom,gdsc@19e000 { @@ -1856,6 +1871,7 @@ qcom,gds-timeout = <500>; parent-supply = <&VDD_MXA_LEVEL>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; gcc_ufs_phy_gdsc: qcom,gdsc@177004 { @@ -1868,6 +1884,7 @@ qcom,gds-timeout = <1500>; qcom,proxy-consumer-enable; qcom,retain-regs; + qcom,support-cfg-gdscr; }; gcc_usb30_prim_gdsc: qcom,gdsc@139004 { @@ -1879,6 +1896,7 @@ qcom,gds-timeout = <500>; qcom,proxy-consumer-enable; qcom,retain-regs; + qcom,support-cfg-gdscr; }; gcc_usb3_phy_gdsc: qcom,gdsc@150018 { @@ -1890,6 +1908,7 @@ parent-supply = <&VDD_MXA_LEVEL>; qcom,proxy-consumer-enable; qcom,retain-regs; + qcom,support-cfg-gdscr; }; /* GPU_CC GDSCs */ @@ -1908,6 +1927,7 @@ qcom,clk-dis-wait-val = <8>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; gpu_cc_gx_domain_addr: syscon@3d99504 { @@ -1942,6 +1962,7 @@ qcom,reset-aon-logic; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; /* VIDEO_CC GDSCs */ @@ -1955,6 +1976,7 @@ qcom,gds-timeout = <500>; qcom,support-hw-trigger; qcom,retain-regs; + qcom,support-cfg-gdscr; }; video_cc_mvs0c_gdsc: qcom,gdsc@abf804c { @@ -1966,6 +1988,7 @@ parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; video_cc_mvs1_gdsc: qcom,gdsc@abf80cc { @@ -1977,7 +2000,9 @@ clocks = <&gcc GCC_VIDEO_AHB_CLK>; qcom,gds-timeout = <500>; qcom,support-hw-trigger; - qcom,retain-regs; }; + qcom,retain-regs; + qcom,support-cfg-gdscr; + }; video_cc_mvs1c_gdsc: qcom,gdsc@abf8078 { compatible = "qcom,gdsc"; @@ -1988,6 +2013,7 @@ clocks = <&gcc GCC_VIDEO_AHB_CLK>; qcom,gds-timeout = <500>; qcom,retain-regs; + qcom,support-cfg-gdscr; }; sdhc_2: sdhci@8804000 {