From 512d61e2d4eb0773e27fab7f87d670d9fee7020e Mon Sep 17 00:00:00 2001 From: Raviteja Laggyshetty Date: Tue, 27 Sep 2022 15:53:40 +0530 Subject: [PATCH] dt-bindings: interconnect: add interconnect bindings for SDXPINN Add interconnect device bindings.These devices can be used to describe any RPMH and NoC based interconnect devices. Change-Id: Ice674b4176cf057c831a961e1faf4ce2bb1461bc --- bindings/interconnect/qcom,sdxpinn.txt | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 bindings/interconnect/qcom,sdxpinn.txt diff --git a/bindings/interconnect/qcom,sdxpinn.txt b/bindings/interconnect/qcom,sdxpinn.txt new file mode 100644 index 00000000..ddde39dc --- /dev/null +++ b/bindings/interconnect/qcom,sdxpinn.txt @@ -0,0 +1,26 @@ +Qualcomm Technologies, Inc. SDXPINN Network-On-Chip interconnect driver binding +------------------------------------------------------------------------------- + +SDXPINN interconnect providers support system bandwidth requirements through +RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is +able to communicate with the BCM through the Resource State Coordinator (RSC) +associated with each execution environment. Provider nodes must point to at +least one RPMh device child node pertaining to their RSC and each provider +can map to multiple RPMh resources. + +Required properties : +- compatible : shall contain only one of the following: + "qcom,sdxpinn-clk_virt", + "qcom,sdxpinn-dc_noc", + "qcom,sdxpinn-gem_noc", + "qcom,sdxpinn-mc_virt", + "qcom,sdxpinn-pcie_anoc", + "qcom,sdxpinn-system_noc", +- #interconnect-cells : should contain 1 + +Examples: + +system_noc: interconnect@1640000 { + compatible = "qcom,sdxpinn-system_noc"; + interconnect-cells = <1>; +};