From cffe9bb3a1ae703805aa153724dd840a55450b43 Mon Sep 17 00:00:00 2001
From: Yatish Kumar Singh <yatishku@qti.qualcomm.com>
Date: Wed, 18 May 2022 12:20:51 +0530
Subject: [PATCH] ARM: dts: msm: Incorrect SID used for Cinder QUP

Updated SID used for Cinder QUP configuration.

Change-Id: I2f406dc6183369352bd5a07926900cd79f600ddf
---
 qcom/cinder-qupv3.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/qcom/cinder-qupv3.dtsi b/qcom/cinder-qupv3.dtsi
index 018dedf1..7ffa998f 100644
--- a/qcom/cinder-qupv3.dtsi
+++ b/qcom/cinder-qupv3.dtsi
@@ -39,7 +39,7 @@
 			<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
-		qcom,gpii-mask = <0x3e>;
+		qcom,gpii-mask = <0xf6>;
 		qcom,ev-factor = <2>;
 		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
 		qcom,gpi-ee-offset = <0x10000>;
@@ -56,7 +56,7 @@
 		clock-names = "m-ahb", "s-ahb";
 		clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
 			<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
-		iommus = <&apps_smmu 0xa3 0x0>;
+		iommus = <&apps_smmu 0xe3 0x0>;
 		qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
 		qcom,iommu-geometry = <0x40000000 0x10000000>;
 		qcom,iommu-dma = "fastmap";
@@ -398,7 +398,7 @@
 		#dma-cells = <5>;
 		reg = <0xa00000  0x60000>;
 		reg-names = "gpi-top";
-		iommus = <&apps_smmu 0x436 0x0>;
+		iommus = <&apps_smmu 0x116 0x0>;
 		qcom,max-num-gpii = <12>;
 		interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
@@ -429,7 +429,7 @@
 		clock-names = "m-ahb", "s-ahb";
 		clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
 			<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
-		iommus = <&apps_smmu 0x423 0x0>;
+		iommus = <&apps_smmu 0x103 0x0>;
 		qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
 		qcom,iommu-geometry = <0x40000000 0x10000000>;
 		qcom,iommu-dma = "fastmap";