mirror of
https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
synced 2026-02-01 09:49:52 +00:00
Add I2C/SPI/UART QUP node for Lemans target. Change-Id: I12edf543e87f61565d86ce798675a959353dbaa2
1474 lines
25 KiB
Plaintext
1474 lines
25 KiB
Plaintext
&tlmm {
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_active: qupv3_se0_i2c_active {
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mux {
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pins = "gpio20", "gpio21";
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function = "qup0_se0";
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};
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config {
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pins = "gpio20", "gpio21";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
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mux {
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pins = "gpio20", "gpio21";
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function = "gpio";
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};
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config {
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pins = "gpio20", "gpio21";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se0_spi_pins: qupv3_se0_spi_pins {
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qupv3_se0_spi_active: qupv3_se0_spi_active {
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mux {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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function = "qup0_se0";
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};
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config {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
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mux {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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function = "gpio";
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};
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config {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
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qupv3_se1_i2c_active: qupv3_se1_i2c_active {
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mux {
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pins = "gpio24", "gpio25";
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function = "qup0_se1";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio24", "gpio25";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_spi_pins: qupv3_se1_spi_pins {
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qupv3_se1_spi_active: qupv3_se1_spi_active {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "qup0_se1";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
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qupv3_se2_i2c_active: qupv3_se2_i2c_active {
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mux {
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pins = "gpio36", "gpio37";
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function = "qup0_se2";
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};
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config {
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pins = "gpio36", "gpio37";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
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mux {
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pins = "gpio36", "gpio37";
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function = "gpio";
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};
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config {
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pins = "gpio36", "gpio37";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se2_spi_pins: qupv3_se2_spi_pins {
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qupv3_se2_spi_active: qupv3_se2_spi_active {
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mux {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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function = "qup0_se2";
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};
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config {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
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mux {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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function = "gpio";
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};
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config {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
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qupv3_se3_i2c_active: qupv3_se3_i2c_active {
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mux {
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pins = "gpio28", "gpio29";
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function = "qup0_se3";
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};
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config {
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pins = "gpio28", "gpio29";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
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mux {
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pins = "gpio28", "gpio29";
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function = "gpio";
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};
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config {
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pins = "gpio28", "gpio29";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se3_spi_pins: qupv3_se3_spi_pins {
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qupv3_se3_spi_active: qupv3_se3_spi_active {
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mux {
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pins = "gpio28", "gpio29",
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"gpio30", "gpio31";
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function = "qup0_se3";
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};
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config {
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pins = "gpio28", "gpio29",
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"gpio30", "gpio31";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
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mux {
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pins = "gpio28", "gpio29",
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"gpio30", "gpio31";
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function = "gpio";
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};
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config {
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pins = "gpio28", "gpio29",
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"gpio30", "gpio31";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
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qupv3_se4_i2c_active: qupv3_se4_i2c_active {
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mux {
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pins = "gpio32", "gpio33";
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function = "qup0_se4";
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};
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config {
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pins = "gpio32", "gpio33";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
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mux {
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pins = "gpio32", "gpio33";
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function = "gpio";
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};
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config {
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pins = "gpio32", "gpio33";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se4_spi_pins: qupv3_se4_spi_pins {
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qupv3_se4_spi_active: qupv3_se4_spi_active {
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mux {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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function = "qup0_se4";
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};
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config {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
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mux {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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function = "gpio";
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};
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config {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
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qupv3_se5_i2c_active: qupv3_se5_i2c_active {
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mux {
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pins = "gpio36", "gpio37";
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function = "qup0_se5";
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};
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config {
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pins = "gpio36", "gpio37";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
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mux {
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pins = "gpio36", "gpio37";
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function = "gpio";
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};
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config {
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pins = "gpio36", "gpio37";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se5_spi_pins: qupv3_se5_spi_pins {
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qupv3_se5_spi_active: qupv3_se5_spi_active {
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mux {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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function = "qup0_se5";
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};
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config {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
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mux {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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function = "gpio";
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};
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config {
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pins = "gpio36", "gpio37",
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"gpio38", "gpio39";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se5_2uart_pins: qupv3_se5_2uart_pins {
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qupv3_se5_2uart_active: qupv3_se5_2uart_active {
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mux {
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pins = "gpio38", "gpio39";
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function = "qup0_se5";
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};
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config {
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pins = "gpio38", "gpio39";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se5_2uart_sleep: qupv3_se5_2uart_sleep {
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mux {
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pins = "gpio38", "gpio39";
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function = "gpio";
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};
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config {
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pins = "gpio38", "gpio39";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
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qupv3_se7_i2c_active: qupv3_se7_i2c_active {
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mux {
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pins = "gpio40", "gpio41";
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function = "qup1_se0";
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};
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config {
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pins = "gpio40", "gpio41";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
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mux {
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pins = "gpio40", "gpio41";
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function = "gpio";
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};
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config {
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pins = "gpio40", "gpio41";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se7_spi_pins: qupv3_se7_spi_pins {
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qupv3_se7_spi_active: qupv3_se7_spi_active {
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mux {
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pins = "gpio40", "gpio41",
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"gpio42", "gpio43";
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function = "qup1_se0";
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};
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config {
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pins = "gpio40", "gpio41",
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"gpio42", "gpio43";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
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mux {
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pins = "gpio40", "gpio41",
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"gpio42", "gpio43";
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function = "gpio";
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};
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config {
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pins = "gpio40", "gpio41",
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"gpio42", "gpio43";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
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qupv3_se8_i2c_active: qupv3_se8_i2c_active {
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mux {
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pins = "gpio42", "gpio43";
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function = "qup1_se1";
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};
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config {
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pins = "gpio42", "gpio43";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
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mux {
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pins = "gpio42", "gpio43";
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function = "gpio";
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};
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config {
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pins = "gpio42", "gpio43";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se8_spi_pins: qupv3_se8_spi_pins {
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qupv3_se8_spi_active: qupv3_se8_spi_active {
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mux {
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pins = "gpio42", "gpio43",
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"gpio40", "gpio41";
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function = "qup1_se1";
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};
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config {
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pins = "gpio42", "gpio43",
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"gpio40", "gpio41";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
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mux {
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pins = "gpio42", "gpio43",
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"gpio40", "gpio41";
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function = "gpio";
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};
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config {
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pins = "gpio42", "gpio43",
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"gpio40", "gpio41";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
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qupv3_se9_i2c_active: qupv3_se9_i2c_active {
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mux {
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pins = "gpio46", "gpio47";
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function = "qup1_se2";
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};
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config {
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pins = "gpio46", "gpio47";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
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mux {
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pins = "gpio46", "gpio47";
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function = "gpio";
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};
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config {
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pins = "gpio46", "gpio47";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se9_spi_pins: qupv3_se9_spi_pins {
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qupv3_se9_spi_active: qupv3_se9_spi_active {
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mux {
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pins = "gpio46", "gpio47",
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"gpio44", "gpio45";
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function = "qup1_se2";
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};
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config {
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pins = "gpio46", "gpio47",
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"gpio44", "gpio45";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
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mux {
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pins = "gpio46", "gpio47",
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"gpio44", "gpio45";
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function = "gpio";
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};
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config {
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pins = "gpio46", "gpio47",
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"gpio44", "gpio45";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se9_2uart_pins: qupv3_se9_2uart_pins {
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qupv3_se9_2uart_active: qupv3_se9_2uart_active {
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mux {
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pins = "gpio44", "gpio45";
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function = "qup1_se2";
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};
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config {
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pins = "gpio44", "gpio45";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
|
|
qupv3_se10_i2c_active: qupv3_se10_i2c_active {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "qup1_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_pins: qupv3_se10_spi_pins {
|
|
qupv3_se10_spi_active: qupv3_se10_spi_active {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "qup1_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_2uart_pins: qupv3_se10_2uart_pins {
|
|
qupv3_se10_2uart_active: qupv3_se10_2uart_active {
|
|
mux {
|
|
pins = "gpio46", "gpio47";
|
|
function = "qup1_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio46", "gpio47";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep {
|
|
mux {
|
|
pins = "gpio46", "gpio47";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio46", "gpio47";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
|
|
qupv3_se11_i2c_active: qupv3_se11_i2c_active {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "qup1_se4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_pins: qupv3_se11_spi_pins {
|
|
qupv3_se11_spi_active: qupv3_se11_spi_active {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
function = "qup1_se4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
|
|
qupv3_se12_i2c_active: qupv3_se12_i2c_active {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "qup1_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_pins: qupv3_se12_spi_pins {
|
|
qupv3_se12_spi_active: qupv3_se12_spi_active {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "qup1_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_4uart_pins: qupv3_se12_4uart_pins {
|
|
qupv3_se12_default_cts: qupv3_se12_default_cts {
|
|
mux {
|
|
pins = "gpio52";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_default_rtsrx: qupv3_se12_default_rtsrx {
|
|
mux {
|
|
pins = "gpio53", "gpio55";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio53", "gpio55";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_default_tx: qupv3_se12_default_tx {
|
|
mux {
|
|
pins = "gpio54";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio54";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_ctsrx: qupv3_se12_ctsrx {
|
|
mux {
|
|
pins = "gpio52", "gpio55";
|
|
function = "qup1_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio55";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_rts: qupv3_se12_rts {
|
|
mux {
|
|
pins = "gpio53";
|
|
function = "qup1_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio53";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_tx: qupv3_se12_tx {
|
|
mux {
|
|
pins = "gpio54";
|
|
function = "qup1_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio54";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
|
|
qupv3_se13_i2c_active: qupv3_se13_i2c_active {
|
|
mux {
|
|
pins = "gpio56", "gpio57";
|
|
function = "qup1_se6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
|
|
qupv3_se14_i2c_active: qupv3_se14_i2c_active {
|
|
mux {
|
|
pins = "gpio80", "gpio81";
|
|
function = "qup2_se0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80", "gpio81";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
|
|
mux {
|
|
pins = "gpio80", "gpio81";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80", "gpio81";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se14_spi_pins: qupv3_se14_spi_pins {
|
|
qupv3_se14_spi_active: qupv3_se14_spi_active {
|
|
mux {
|
|
pins = "gpio80", "gpio81",
|
|
"gpio82", "gpio83";
|
|
function = "qup2_se0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80", "gpio81",
|
|
"gpio82", "gpio83";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
|
|
mux {
|
|
pins = "gpio80", "gpio81",
|
|
"gpio82", "gpio83";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80", "gpio81",
|
|
"gpio82", "gpio83";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
|
|
qupv3_se15_i2c_active: qupv3_se15_i2c_active {
|
|
mux {
|
|
pins = "gpio84", "gpio85";
|
|
function = "qup2_se1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio84", "gpio85";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
|
|
mux {
|
|
pins = "gpio84", "gpio85";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio84", "gpio85";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_pins: qupv3_se15_spi_pins {
|
|
qupv3_se15_spi_active: qupv3_se15_spi_active {
|
|
mux {
|
|
pins = "gpio84", "gpio85",
|
|
"gpio99", "gpio100";
|
|
function = "qup2_se1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio84", "gpio85",
|
|
"gpio99", "gpio100";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
|
|
mux {
|
|
pins = "gpio84", "gpio85",
|
|
"gpio99", "gpio100";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio84", "gpio85",
|
|
"gpio99", "gpio100";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se16_i2c_pins: qupv3_se16_i2c_pins {
|
|
qupv3_se16_i2c_active: qupv3_se16_i2c_active {
|
|
mux {
|
|
pins = "gpio86", "gpio87";
|
|
function = "qup2_se2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio86", "gpio87";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se16_i2c_sleep: qupv3_se16_i2c_sleep {
|
|
mux {
|
|
pins = "gpio86", "gpio87";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio86", "gpio87";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se16_spi_pins: qupv3_se16_spi_pins {
|
|
qupv3_se16_spi_active: qupv3_se16_spi_active {
|
|
mux {
|
|
pins = "gpio86", "gpio87",
|
|
"gpio88", "gpio89";
|
|
function = "qup2_se2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio86", "gpio87",
|
|
"gpio88", "gpio89";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se16_spi_sleep: qupv3_se16_spi_sleep {
|
|
mux {
|
|
pins = "gpio86", "gpio87",
|
|
"gpio88", "gpio89";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio86", "gpio87",
|
|
"gpio88", "gpio89";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se17_i2c_pins: qupv3_se17_i2c_pins {
|
|
qupv3_se17_i2c_active: qupv3_se17_i2c_active {
|
|
mux {
|
|
pins = "gpio91", "gpio92";
|
|
function = "qup2_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91", "gpio92";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se17_i2c_sleep: qupv3_se17_i2c_sleep {
|
|
mux {
|
|
pins = "gpio91", "gpio92";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91", "gpio92";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se17_spi_pins: qupv3_se17_spi_pins {
|
|
qupv3_se17_spi_active: qupv3_se17_spi_active {
|
|
mux {
|
|
pins = "gpio91", "gpio92",
|
|
"gpio93", "gpio94";
|
|
function = "qup2_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91", "gpio92",
|
|
"gpio93", "gpio94";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se17_spi_sleep: qupv3_se17_spi_sleep {
|
|
mux {
|
|
pins = "gpio91", "gpio92",
|
|
"gpio93", "gpio94";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91", "gpio92",
|
|
"gpio93", "gpio94";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se17_4uart_pins: qupv3_se17_4uart_pins {
|
|
qupv3_se17_default_cts: qupv3_se17_default_cts {
|
|
mux {
|
|
pins = "gpio91";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se17_default_rtsrx: qupv3_se17_default_rtsrx {
|
|
mux {
|
|
pins = "gpio92", "gpio94";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio92", "gpio94";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se17_default_tx: qupv3_se17_default_tx {
|
|
mux {
|
|
pins = "gpio93";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio93";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se17_ctsrx: qupv3_se17_ctsrx {
|
|
mux {
|
|
pins = "gpio91", "gpio94";
|
|
function = "qup2_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio91", "gpio94";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se17_rts: qupv3_se17_rts {
|
|
mux {
|
|
pins = "gpio92";
|
|
function = "qup2_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio92";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se17_tx: qupv3_se17_tx {
|
|
mux {
|
|
pins = "gpio93";
|
|
function = "qup2_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio93";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se18_i2c_pins: qupv3_se18_i2c_pins {
|
|
qupv3_se18_i2c_active: qupv3_se18_i2c_active {
|
|
mux {
|
|
pins = "gpio95", "gpio96";
|
|
function = "qup2_se4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio95", "gpio96";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se18_i2c_sleep: qupv3_se18_i2c_sleep {
|
|
mux {
|
|
pins = "gpio95", "gpio96";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio95", "gpio96";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se18_spi_pins: qupv3_se18_spi_pins {
|
|
qupv3_se18_spi_active: qupv3_se18_spi_active {
|
|
mux {
|
|
pins = "gpio95", "gpio96",
|
|
"gpio97", "gpio98";
|
|
function = "qup2_se4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio95", "gpio96",
|
|
"gpio97", "gpio98";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se18_spi_sleep: qupv3_se18_spi_sleep {
|
|
mux {
|
|
pins = "gpio95", "gpio96",
|
|
"gpio97", "gpio98";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio95", "gpio96",
|
|
"gpio97", "gpio98";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se19_i2c_pins: qupv3_se19_i2c_pins {
|
|
qupv3_se19_i2c_active: qupv3_se19_i2c_active {
|
|
mux {
|
|
pins = "gpio99", "gpio100";
|
|
function = "qup2_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99", "gpio100";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se19_i2c_sleep: qupv3_se19_i2c_sleep {
|
|
mux {
|
|
pins = "gpio99", "gpio100";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99", "gpio100";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se19_spi_pins: qupv3_se19_spi_pins {
|
|
qupv3_se19_spi_active: qupv3_se19_spi_active {
|
|
mux {
|
|
pins = "gpio99", "gpio100",
|
|
"gpio84", "gpio95";
|
|
function = "qup2_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99", "gpio100",
|
|
"gpio84", "gpio95";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se19_spi_sleep: qupv3_se19_spi_sleep {
|
|
mux {
|
|
pins = "gpio99", "gpio100",
|
|
"gpio84", "gpio95";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio99", "gpio100",
|
|
"gpio84", "gpio95";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se20_i2c_pins: qupv3_se20_i2c_pins {
|
|
qupv3_se20_i2c_active: qupv3_se20_i2c_active {
|
|
mux {
|
|
pins = "gpio97", "gpio98";
|
|
function = "qup2_se6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97", "gpio98";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se20_i2c_sleep: qupv3_se20_i2c_sleep {
|
|
mux {
|
|
pins = "gpio97", "gpio98";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97", "gpio98";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se20_spi_pins: qupv3_se20_spi_pins {
|
|
qupv3_se20_spi_active: qupv3_se20_spi_active {
|
|
mux {
|
|
pins = "gpio97", "gpio98",
|
|
"gpio95", "gpio96";
|
|
function = "qup2_se6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97", "gpio98",
|
|
"gpio95", "gpio96";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se20_spi_sleep: qupv3_se20_spi_sleep {
|
|
mux {
|
|
pins = "gpio97", "gpio98",
|
|
"gpio95", "gpio96";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio97", "gpio98",
|
|
"gpio95", "gpio96";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se21_i2c_pins: qupv3_se21_i2c_pins {
|
|
qupv3_se21_i2c_active: qupv3_se21_i2c_active {
|
|
mux {
|
|
pins = "gpio13", "gpio14";
|
|
function = "qup3_se0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13", "gpio14";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se21_i2c_sleep: qupv3_se21_i2c_sleep {
|
|
mux {
|
|
pins = "gpio13", "gpio14";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13", "gpio14";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se21_spi_pins: qupv3_se21_spi_pins {
|
|
qupv3_se21_spi_active: qupv3_se21_spi_active {
|
|
mux {
|
|
pins = "gpio13", "gpio14",
|
|
"gpio15", "gpio16";
|
|
function = "qup3_se0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13", "gpio14",
|
|
"gpio15", "gpio16";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se21_spi_sleep: qupv3_se21_spi_sleep {
|
|
mux {
|
|
pins = "gpio13", "gpio14",
|
|
"gpio15", "gpio16";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13", "gpio14",
|
|
"gpio15", "gpio16";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
};
|