mirror of
https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
synced 2026-02-01 05:00:27 +00:00
c0f7e62de2
Add thermal driver tree support for sa410m. Change-Id: I62a7cbc3af321e11ec648080486964e21dc2e06b
449 lines
8.3 KiB
Plaintext
449 lines
8.3 KiB
Plaintext
#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&intc>;
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memory { device_type = "memory"; reg = <0 0 0 0>; };
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reserved_memory: reserved-memory { };
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mem-offline {
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compatible = "qcom,mem-offline";
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offline-sizes = <0x1 0x40000000 0x0 0x40000000>,
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<0x1 0xc0000000 0x0 0x80000000>,
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<0x2 0xc0000000 0x1 0x40000000>;
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granule = <512>;
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};
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aliases {
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};
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firmware: firmware {};
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x0>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_0>;
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#cooling-cells = <2>;
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L2_0: l2-cache {
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compatible = "arm,arch-cache";
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cache-level = <2>;
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};
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L1_I_0: l1-icache {
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compatible = "arm,arch-cache";
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};
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L1_D_0: l1-dcache {
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compatible = "arm,arch-cache";
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};
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};
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CPU1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x1>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_0>;
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#cooling-cells = <2>;
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L1_I_1: l1-icache {
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compatible = "arm,arch-cache";
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};
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L1_D_1: l1-dcache {
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compatible = "arm,arch-cache";
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};
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};
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CPU2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x2>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_0>;
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#cooling-cells = <2>;
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L1_I_2: l1-icache {
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compatible = "arm,arch-cache";
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};
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L1_D_2: l1-dcache {
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compatible = "arm,arch-cache";
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};
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};
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CPU3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,armv8";
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reg = <0x0 0x3>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_0>;
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#cooling-cells = <2>;
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L1_I_3: l1-icache {
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compatible = "arm,arch-cache";
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};
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L1_D_3: l1-dcache {
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compatible = "arm,arch-cache";
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};
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};
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&CPU0>;
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};
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core1 {
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cpu = <&CPU1>;
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};
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core2 {
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cpu = <&CPU2>;
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};
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core3 {
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cpu = <&CPU3>;
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};
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};
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};
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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chosen {
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bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
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};
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soc: soc { };
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};
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&reserved_memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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hyp_region: hyp_region@45600000 {
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no-map;
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reg = <0x0 0x45600000 0x0 0x700000>;
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};
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xbl_aop_mem: xbl_aop_mem@45d00000 {
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no-map;
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reg = <0x0 0x45d00000 0x0 0x200000>;
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};
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sec_apps_mem: sec_apps_region@45fff000 {
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no-map;
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reg = <0x0 0x45fff000 0x0 0x1000>;
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};
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smem_region: smem@46000000 {
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no-map;
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reg = <0x0 0x46000000 0x0 0x200000>;
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};
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pil_modem_mem: modem_region@4ab00000 {
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no-map;
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reg = <0x0 0x4ab00000 0x0 0x6900000>;
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};
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wlan_msa_mem: wlan_msa_region@51400000 {
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no-map;
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reg = <0x0 0x51400000 0x0 0x100000>;
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};
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pil_adsp_mem: adsp_regions@51500000 {
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no-map;
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reg = <0x0 0x51500000 0x0 0x1400000>;
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};
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pil_ipa_fw_mem: ips_fw_region@52900000 {
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no-map;
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reg = <0x0 0x52900000 0x0 0x10000>;
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};
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pil_ipa_gsi_mem: ipa_gsi_region@52910000 {
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no-map;
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reg = <0x0 0x52910000 0x0 0x5000>;
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};
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tz_stat: tz_stat@53200000 {
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no-map;
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reg = <0x0 0x53200000 0x0 0x100000>;
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};
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pimem_vault: pimem_vault@53300000 {
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no-map;
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reg = <0x0 0x53300000 0x0 0x1500000>;
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};
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adsp_mem: adsp_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0 0x00000000 0 0xffffffff>;
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reusable;
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alignment = <0 0x400000>;
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size = <0 0x800000>;
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};
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dump_mem: mem_dump_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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size = <0 0x800000>;
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};
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user_contig_mem: user_contig_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x1000000>;
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};
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qseecom_mem: qseecom_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x700000>;
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};
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qseecom_ta_mem: qseecom_ta_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x400000>;
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};
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memshare_mem: memshare_region {
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compatible = "shared-dma-pool";
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no-map;
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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alignment = <0x0 0x100000>;
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size = <0x0 0x800000>;
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};
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/* global autoconfigured region for contiguous allocations */
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linux,cma {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x2000000>;
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linux,cma-default;
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};
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0 0xffffffff>;
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compatible = "simple-bus";
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intc: interrupt-controller@f200000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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interrupt-controller;
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interrupt-parent = <&intc>;
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#redistributor-regions = <1>;
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redistributor-stride = <0x0 0x20000>;
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reg = <0xf200000 0x10000>, /* GICD */
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<0xf300000 0x100000>; /* GICR * 8 */
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <0>;
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};
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arch_timer: timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <19200000>;
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};
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memtimer: timer@f120000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0xf120000 0x1000>;
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clock-frequency = <19200000>;
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frame@f121000 {
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frame-number = <0>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf121000 0x1000>,
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<0xf122000 0x1000>;
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};
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frame@f123000 {
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frame-number = <1>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf123000 0x1000>;
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status = "disabled";
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};
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frame@f124000 {
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frame-number = <2>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf124000 0x1000>;
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status = "disabled";
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};
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frame@f125000 {
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frame-number = <3>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf125000 0x1000>;
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status = "disabled";
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};
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frame@f126000 {
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frame-number = <4>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf126000 0x1000>;
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status = "disabled";
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};
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frame@f127000 {
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frame-number = <5>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf127000 0x1000>;
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status = "disabled";
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};
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frame@f128000 {
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frame-number = <6>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf128000 0x1000>;
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status = "disabled";
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};
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};
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thermal_zones: thermal-zones { };
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};
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#include "sa410m-stub-regulators.dtsi"
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#include "scuba-thermal.dtsi"
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&thermal_zones {
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gpu {
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trips {
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gpu-cxip-trip {
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temperature = <105000>;
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};
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gpu-trip {
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temperature = <105000>;
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};
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gpu-cx-mon {
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temperature = <115000>;
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};
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};
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cooling-maps {
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/delete-node/ gpu_cdev;
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/delete-node/ gpu-cx-cdev0;
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};
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};
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cpuss-0 {
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trips {
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cpu-0-2-config {
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temperature = <115000>;
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};
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};
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};
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cpuss-1 {
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trips {
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cpu-1-3-configs {
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temperature = <115000>;
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};
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};
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};
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mdm-0 {
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trips {
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mdm0-cx-mon {
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temperature = <105000>;
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};
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mdm0_emer_mon: mdm0-emer-mon {
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temperature = <125000>;
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hysteresis = <5000>;
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type = "passive";
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};
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};
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cooling-maps {
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/delete-node/ mdm0-cx-cdev0;
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/delete-node/ mdm0-cx-cdev2;
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mdm0-cx-cdev1 {
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cooling-device = <&modem_proc 1 1>;
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};
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mdm0-emer-cdev0 {
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trip = <&mdm0_emer_mon>;
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cooling-device = <&modem_proc 3 3>;
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};
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};
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};
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mdm-1 {
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trips {
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mdm1-cx-mon {
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temperature = <105000>;
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};
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mdm1_emer_mon: mdm1-emer-mon {
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temperature = <125000>;
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hysteresis = <5000>;
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type = "passive";
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};
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};
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cooling-maps {
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/delete-node/ mdm1-cx-cdev0;
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/delete-node/ mdm1-cx-cdev2;
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mdm1-cx-cdev1 {
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cooling-device = <&modem_proc 1 1>;
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};
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mdm1-emer-cdev0 {
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trip = <&mdm1_emer_mon>;
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cooling-device = <&modem_proc 3 3>;
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};
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};
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};
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};
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