#include "waipio-vm.dtsi"

/ {
	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>;
	interrupt-parent = <&vgic>;

	gunyah-vsock {
		status = "disabled";
	};

	qcom,vm-config {
		iomemory-ranges = <0x0 0xae8f000 0x0 0xae8f000 0x0 0x1000 0x0
				0x0 0x0928000 0x0 0x0928000 0x0 0x4000 0x0
				0x0 0xc400000 0x0 0xc400000 0x0 0x3000 0x1
				0x0 0xc42d000 0x0 0xc42d000 0x0 0x4000 0x1
				0x0 0xc440000 0x0 0xc440000 0x0 0x80000 0x1
				0x0 0xc4c0000 0x0 0xc4c0000 0x0 0x10000 0x1>;
		gic-irq-ranges = <282 282>; /* PVM->SVM IRQ transfer */
		vdevices {
			gvsock-message-queue-pair {
				status = "disabled";
			};
		};
	};
};

&soc {

	/delete-node/ interrupt-controller@17100000;

	qcom,spmi@c42d000 {
		status = "disabled";
	};

	vgic: interrupt-controller@17200000 {
		compatible = "arm,gic-v3";
		interrupt-controller;
		#interrupt-cells = <0x3>;
		#redistributor-regions = <1>;
		redistributor-stride = <0x0 0x20000>;
		reg = <0x17200000 0x10000>,     /* GICD */
		<0x17260000 0x100000>;    /* GICR * 8 */
	};

	pinctrl@f000000 {
		compatible = "qcom,ravelin-vm-pinctrl";
		gpios = /bits/ 16 <>;
	};

	tlmm-vm-mem-access {
		tlmm-vm-gpio-list = <>;
	};

	apps-smmu@15000000 {
		qcom,actlr =
			/* Display and camera clients, +0 PF */
			<0x1900 0x3F 0x1>,
			<0x1800 0xFF 0x1>,
			<0x800 0x7FF 0x1>,
			/* For video clients, +3 PF */
			<0x1980 0x3F 0x103>;
	};

	/delete-node/ qup_common_iommu_group;
	/delete-node/ qcom,qupv3_0_geni_se@9c0000;
	/delete-node/ qcom,gpi-dma@900000;
	/delete-node/ i2c@990000;
	/delete-node/ spi@990000;

	qup_iommu_group: qup_common_iommu_group {
			qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
	};

	/* QUPv3_0 wrapper instance */
	qupv3_0: qcom,qupv3_0_geni_se@9c0000 {
		compatible = "qcom,qupv3-geni-se";
		reg = <0x9c0000 0x2000>;
		iommus = <&apps_smmu 0x178 0x0>;
		qcom,iommu-group = <&qup_iommu_group>;
		dma-coherent;
		status = "ok";
	};

	gpi_dma0: qcom,gpi-dma@900000  {
		compatible = "qcom,gpi-dma";
		#dma-cells = <5>;
		reg = <0x900000  0x60000>;
		reg-names = "gpi-top";
		iommus = <&apps_smmu 0x178 0x0>;
		qcom,iommu-group = <&qup_iommu_group>;
		dma-coherent;
		interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
		qcom,max-num-gpii = <12>;
		qcom,gpii-mask = <0x40>;
		qcom,ev-factor = <2>;
		qcom,gpi-ee-offset = <0x10000>;
		qcom,le-vm;
		status = "ok";
	};

	/* Legacy Touch over I2C */
	qupv3_se1_i2c: i2c@984000 {
		compatible = "qcom,i2c-geni";
		reg = <0x984000 0x4000>;
		#address-cells = <1>;
		#size-cells = <0>;
		dmas = <&gpi_dma0 0 1 3 64 0>,
			<&gpi_dma0 1 1 3 64 0>;
		dma-names = "tx", "rx";
		qcom,wrapper-core = <&qupv3_0>;
		qcom,le-vm;
		status = "disabled";
	};

	qupv3_se1_spi: spi@984000 {
		compatible = "qcom,spi-geni";
		reg = <0x984000 0x4000>;
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "se_phys";
		dmas = <&gpi_dma0 0 1 1 64 0>,
			<&gpi_dma0 1 1 1 64 0>;
		dma-names = "tx", "rx";
		spi-max-frequency = <50000000>;
		qcom,wrapper-core = <&qupv3_0>;
		qcom,le-vm;
		status = "disabled";
	};
};
