#include "cape-sde-display.dtsi"
#include "dsi-panel-l18-38-0c-0a-prim-dsc-cmd.dtsi"
#include "dsi-panel-l18-38-0c-0a-sec-dsc-cmd.dtsi"
#include "dsi-panel-sec-sim-video.dtsi"

&soc {
	dsi_panel_pwr_supply_prim_L18: dsi_panel_pwr_supply_prim_L18 {
		#address-cells = <1>;
		#size-cells = <0>;
		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <300000>;
			qcom,supply-disable-load = <80>;
		};

		qcom,panel-supply-entry@2 {
			reg = <2>;
			qcom,supply-name = "vci";
			qcom,supply-min-voltage = <3000000>;
			qcom,supply-max-voltage = <3000000>;
			qcom,supply-enable-load = <300000>;
			qcom,supply-disable-load = <0>;
		};
	};

	dsi_panel_pwr_supply_sec_L18: dsi_panel_pwr_supply_sec_L18 {
		#address-cells = <1>;
		#size-cells = <0>;
		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "secvddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <300000>;
			qcom,supply-disable-load = <80>;
		};

		qcom,panel-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "secdvddd";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <1800000>;
			qcom,supply-enable-load = <300000>;
			qcom,supply-disable-load = <80>;
		};

		qcom,panel-supply-entry@2 {
			reg = <2>;
			qcom,supply-name = "secvci";
			qcom,supply-min-voltage = <3000000>;
			qcom,supply-max-voltage = <3000000>;
			qcom,supply-enable-load = <300000>;
			qcom,supply-disable-load = <80>;
		};
	};
};

&dsi_sec_sim_vid {
	qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
	qcom,mdss-dsi-display-timings {
		/* 60hz */
		timing@0{
			qcom,mdss-dsi-panel-phy-timings = [00 23 09 09 1A 24 09
				09 09 02 04 00 1D 0E];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_l18_38_0c_0a_prim_dsc_cmd {
	qcom,mdss-dsi-panel-vsync-delay;
	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
	qcom,mdss-dsi-clk-strength = <0xFF>;
	qcom,mdss-dsi-display-timings {
		/* 60hz */
		timing@0{
			qcom,mdss-dsi-panel-phy-timings = [00 27 0A 0A 1B 25 0A
				0B 0A 02 04 00 20 0F];
			qcom,display-topology = <2 2 1>;
			qcom,default-topology-index = <0>;
		};
		/* 120hz */
		timing@1{
			qcom,mdss-dsi-panel-phy-timings = [00 27 0A 0A 1B 25 0A
				0B 0A 02 04 00 20 0F];
			qcom,display-topology = <2 2 1>;
			qcom,default-topology-index = <0>;
		};
		/* 30hz */
		timing@2{
			qcom,mdss-dsi-panel-phy-timings = [00 27 0A 0A 1B 25 0A
				0B 0A 02 04 00 20 0F];
			qcom,display-topology = <2 2 1>;
			qcom,default-topology-index = <0>;
		};
		/* 10hz */
		timing@3{
			qcom,mdss-dsi-panel-phy-timings = [00 27 0A 0A 1B 25 0A
				0B 0A 02 04 00 20 0F];
			qcom,display-topology = <2 2 1>;
			qcom,default-topology-index = <0>;
		};
		/* 1hz */
		timing@4{
			qcom,mdss-dsi-panel-phy-timings = [00 27 0A 0A 1B 25 0A
				0B 0A 02 04 00 20 0F];
			qcom,display-topology = <2 2 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_l18_38_0c_0a_sec_dsc_cmd {
	qcom,mdss-dsi-panel-vsync-delay;
	qcom,ulps-enabled;
	qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
	qcom,mdss-dsi-clk-strength = <0xFF>;
	qcom,mdss-dsi-display-timings {
		/* 60hz */
		timing@0{
			qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
				07 08 02 04 00 19 0C];
			qcom,display-topology = <1 1 1>;
			qcom,default-topology-index = <0>;
		};
		/* 120hz */
		timing@1{
			qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
				07 08 02 04 00 19 0C];
			qcom,display-topology = <1 1 1>;
			qcom,default-topology-index = <0>;
		};
		/* 90hz */
		timing@2{
			qcom,mdss-dsi-panel-phy-timings = [00 1D 07 07 17 22 07
				07 08 02 04 00 19 0C];
			qcom,display-topology = <1 1 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_l18_38_0c_0a_prim_dsc_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_prim_L18>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <4>;
	qcom,mdss-dsi-bl-max-level = <2047>;
	qcom,mdss-brightness-max-level = <2047>;
	qcom,mdss-brightness-init-level = <307>;
	qcom,platform-reset-gpio = <&tlmm 0 0>;
};

&dsi_l18_38_0c_0a_sec_dsc_cmd {
	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sec_L18>;
	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <4>;
	qcom,mdss-dsi-bl-max-level = <4095>;
	qcom,mdss-brightness-max-level = <4095>;
	qcom,mdss-brightness-init-level = <307>;
	qcom,platform-sec-reset-gpio = <&tlmm 125 0>;
};

&dsi_r66451_amoled_cmd {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <1>;
	qcom,mdss-dsi-bl-max-level = <4095>;
	qcom,mdss-brightness-max-level = <255>;
	qcom,mdss-dsi-bl-inverted-dbv;
	qcom,platform-reset-gpio = <&tlmm 0 0>;
};

&dsi_r66451_amoled_video {
	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <1>;
	qcom,mdss-dsi-bl-max-level = <4095>;
	qcom,mdss-brightness-max-level = <255>;
	qcom,mdss-dsi-bl-inverted-dbv;
	qcom,platform-reset-gpio = <&tlmm 0 0>;
};

&soc {
	display_panel_vddd: display_panel_vddd {
		compatible = "regulator-fixed";
		regulator-name = "display_panel_vddd";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&tlmm 93 0>;
		enable-active-high;
		regulator-boot-on;
	};
};

&sde_dsi1_active {
	mux {
		pins = "gpio125";
		function = "gpio";
	};

	config {
		pins = "gpio125";
		drive-strength = <8>;
		bias-disable = <0>;
	};
};

&sde_dsi1_suspend {
	mux {
		pins = "gpio125";
		function = "gpio";
	};

	config {
		pins = "gpio125";
		drive-strength = <2>;
		bias-pull-down;
	};
};

&dsi_sec_sim_vid {
	qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sec_L18>;
	qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
	qcom,mdss-dsi-bl-min-level = <4>;
	qcom,mdss-dsi-bl-max-level = <2047>;
	qcom,mdss-brightness-max-level = <2047>;
	qcom,platform-sec-reset-gpio = <&tlmm 125 0>;
};

&sde_dsi {
	qcom,dsi-default-panel = <&dsi_r66451_amoled_video>;
};

&qupv3_se1_i2c {
	wl2866d_pm:willsemi,ldo@28 {
		wl2866d_dvdd1:on,wl2866d@0{
			offset = /bits/ 16 <0x0000>;
			regulator-name ="wl2866d-dvdd1";
			regulator-min-microvolt = <600000>;
			regulator-max-microvolt = <1800000>;
			min-dropout-voltage = <80000>;
			iout_ua = <500000>;
			init-voltage = <1800000>;
		};

		wl2866d_avdd1:on,wl2866d@2{
			offset = /bits/ 16 <0x0002>;
			regulator-name ="wl2866d-avdd1";
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <4300000>;
			min-dropout-voltage = <90000>;
			iout_ua = <300000>;
			init-voltage = <3000000>;
		};
	};
};

&sde_dsi1 {
	secdvddd-supply = <&display_panel_vddd>;
	secvci-supply = <&wl2866d_avdd1>;
	secvddio-supply = <&wl2866d_dvdd1>;
	qcom,dsi-default-panel = <&dsi_sec_sim_vid>;
};

&sde_dp {
       status = "disabled";
};

&pm8350c_rgb {
       status = "disabled";
};

&mdss_mdp {
        connectors = <&sde_dsi &sde_dsi1 &smmu_sde_unsec &smmu_sde_sec &sde_wb &sde_rscc>;
 };

&qupv3_se4_spi {
	fts-pri@0 {
		panel = <&dsi_l18_38_0c_0a_prim_dsc_cmd>;
	};
};

&qupv3_se19_spi {
	fts-sec@0 {
		panel = <&dsi_l18_38_0c_0a_sec_dsc_cmd>;
	};
};

&soc {
	thermal_screen: thermal-screen {
		panel = <&dsi_l18_38_0c_0a_prim_dsc_cmd>;
		panel1 = <&dsi_l18_38_0c_0a_sec_dsc_cmd>;
        };
	charge_screen: charge-screen {
		panel  = <&dsi_l18_38_0c_0a_prim_dsc_cmd
				&dsi_r66451_amoled_video>;
		panel_sec = <&dsi_l18_38_0c_0a_sec_dsc_cmd
				&dsi_r66451_amoled_video>;
        };

	xiaomi-touch  {
		panel-primary = <&dsi_l18_38_0c_0a_prim_dsc_cmd
			&dsi_r66451_amoled_video>;
		panel-secondary = <&dsi_l18_38_0c_0a_sec_dsc_cmd
			&dsi_r66451_amoled_video>;
	};
};

&spmi_bus {
	qcom,pm8350b@3 {
		qcom,amoled-ecm@f900 {
			display-panels = <&dsi_r66451_amoled_cmd
					&dsi_r66451_amoled_video>;
		};
	};
};
