diff --git a/cape-camera-sensor-cdp.dts b/cape-camera-sensor-cdp.dts index dc3fa721..950a831b 100644 --- a/cape-camera-sensor-cdp.dts +++ b/cape-camera-sensor-cdp.dts @@ -1,16 +1,16 @@ /dts-v1/; /plugin/; -#include -#include -#include +#include +#include +#include #include #include #include "cape-camera-sensor-cdp.dtsi" / { model = "Qualcomm Technologies, Inc. Cape CDP"; - compatible = "qcom,cape"; + compatible = "qcom,cape", "qcom,capep"; qcom,msm-id = <530 0x10000>; qcom,board-id = <1 0>; }; diff --git a/cape-camera-sensor-cdp.dtsi b/cape-camera-sensor-cdp.dtsi index 92877fc3..d7f6964f 100644 --- a/cape-camera-sensor-cdp.dtsi +++ b/cape-camera-sensor-cdp.dtsi @@ -1,4 +1,4 @@ -#include +#include #include &soc { diff --git a/cape-camera-sensor-mtp.dts b/cape-camera-sensor-mtp.dts index b5355c34..29bcd56d 100644 --- a/cape-camera-sensor-mtp.dts +++ b/cape-camera-sensor-mtp.dts @@ -1,16 +1,16 @@ /dts-v1/; /plugin/; -#include -#include -#include +#include +#include +#include #include #include #include "cape-camera-sensor-mtp.dtsi" / { model = "Qualcomm Technologies, Inc. Cape MTP"; - compatible = "qcom,cape"; + compatible = "qcom,cape", "qcom,capep"; qcom,msm-id = <530 0x10000>; qcom,board-id = <8 0>; }; diff --git a/cape-camera-sensor-mtp.dtsi b/cape-camera-sensor-mtp.dtsi index 2b99c393..599d6932 100644 --- a/cape-camera-sensor-mtp.dtsi +++ b/cape-camera-sensor-mtp.dtsi @@ -1,4 +1,4 @@ -#include +#include #include &soc { diff --git a/cape-camera.dtsi b/cape-camera.dtsi index 6266494c..bdd5661c 100644 --- a/cape-camera.dtsi +++ b/cape-camera.dtsi @@ -1,5 +1,521 @@ #include +&tlmm { + cci0_active: cci0_active { + mux { + /* CLK, DATA */ + pins = "gpio110","gpio111"; // Only 2 + function = "cci_i2c"; + }; + + config { + pins = "gpio110","gpio111"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci0_suspend: cci0_suspend { + mux { + /* CLK, DATA */ + pins = "gpio110","gpio111"; + function = "cci_i2c"; + }; + + config { + pins = "gpio110","gpio111"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci1_active: cci1_active { + mux { + /* CLK, DATA */ + pins = "gpio112","gpio113"; + function = "cci_i2c"; + }; + + config { + pins = "gpio112","gpio113"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci1_suspend: cci1_suspend { + mux { + /* CLK, DATA */ + pins = "gpio112","gpio113"; + function = "cci_i2c"; + }; + + config { + pins = "gpio112","gpio113"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci2_active: cci2_active { + mux { + /* CLK, DATA */ + pins = "gpio114","gpio115"; + function = "cci_i2c"; + }; + + config { + pins = "gpio114","gpio115"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci2_suspend: cci2_suspend { + mux { + /* CLK, DATA */ + pins = "gpio114","gpio115"; + function = "cci_i2c"; + }; + + config { + pins = "gpio114","gpio115"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci3_active: cci3_active { + mux { + /* CLK, DATA */ + pins = "gpio208","gpio209"; + function = "cci_i2c"; + }; + + config { + pins = "gpio208","gpio209"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,apps; + }; + }; + + cci3_suspend: cci3_suspend { + mux { + /* CLK, DATA */ + pins = "gpio208","gpio209"; + function = "cci_i2c"; + }; + + config { + pins = "gpio208","gpio209"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + qcom,remote; + }; + + }; + + cam_sensor_mclk0_active: cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio100"; + function = "cam_mclk"; + }; + + config { + pins = "gpio100"; + bias-disable; /* No PULL */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio100"; + function = "cam_mclk"; + }; + + config { + pins = "gpio100"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk1_active: cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio101"; + function = "cam_mclk"; + }; + + config { + pins = "gpio101"; + bias-disable; /* No PULL */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio101"; + function = "cam_mclk"; + }; + + config { + pins = "gpio101"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk2_active: cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio102"; + function = "cam_mclk"; + }; + + config { + pins = "gpio102"; + bias-disable; /* No PULL */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio102"; + function = "cam_mclk"; + }; + + config { + pins = "gpio102"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk3_active: cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio103"; + function = "cam_mclk"; + }; + + config { + pins = "gpio103"; + bias-disable; /* No PULL */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio103"; + function = "cam_mclk"; + }; + + config { + pins = "gpio103"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk4_active: cam_sensor_mclk4_active { + /* MCLK4 */ + mux { + pins = "gpio104"; + function = "cam_mclk"; + }; + + config { + pins = "gpio104"; + bias-disable; /* No PULL */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk4_suspend: cam_sensor_mclk4_suspend { + /* MCLK4 */ + mux { + pins = "gpio104"; + function = "cam_mclk"; + }; + + config { + pins = "gpio104"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk5_active: cam_sensor_mclk5_active { + /* MCLK5 */ + mux { + pins = "gpio105"; + function = "cam_mclk"; + }; + + config { + pins = "gpio105"; + bias-disable; /* No PULL */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk5_suspend: cam_sensor_mclk5_suspend { + /* MCLK5 */ + mux { + pins = "gpio105"; + function = "cam_mclk"; + }; + + config { + pins = "gpio105"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk6_active: cam_sensor_mclk6_active { + /* MCLK6 */ + mux { + pins = "gpio106"; + function = "cam_mclk"; + }; + + config { + pins = "gpio106"; + bias-disable; /* No PULL */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_mclk6_suspend: cam_sensor_mclk6_suspend { + /* MCLK6 */ + mux { + pins = "gpio106"; + function = "cam_mclk"; + }; + + config { + pins = "gpio106"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <6>; /* 6 MA */ + }; + }; + + cam_sensor_active_rst0: cam_sensor_active_rst0 { + /* RESET REAR */ + mux { + pins = "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio25"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst0: cam_sensor_suspend_rst0 { + /* RESET REAR */ + mux { + pins = "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio25"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst1: cam_sensor_active_rst1 { + /* RESET REARAUX */ + mux { + pins = "gpio24"; + function = "gpio"; + }; + + config { + pins = "gpio24"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst1: cam_sensor_suspend_rst1 { + /* RESET REARAUX */ + mux { + pins = "gpio24"; + function = "gpio"; + }; + + config { + pins = "gpio24"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst2: cam_sensor_active_rst2 { + /* RESET 2 */ + mux { + pins = "gpio117"; + function = "gpio"; + }; + + config { + pins = "gpio117"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst2: cam_sensor_suspend_rst2 { + /* RESET 2 */ + mux { + pins = "gpio117"; + function = "gpio"; + }; + + config { + pins = "gpio117"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst3: cam_sensor_active_rst3 { + /* RESET 3 */ + mux { + pins = "gpio120"; + function = "gpio"; + }; + + config { + pins = "gpio120"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst3: cam_sensor_suspend_rst3 { + /* RESET 3 */ + mux { + pins = "gpio120"; + function = "gpio"; + }; + + config { + pins = "gpio120"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst4: cam_sensor_active_rst4 { + /* RESET 4 */ + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst4: cam_sensor_suspend_rst4 { + /* RESET 4 */ + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst5: cam_sensor_active_rst5 { + /* RESET 5 */ + mux { + pins = "gpio118"; + function = "gpio"; + }; + + config { + pins = "gpio118"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst5: cam_sensor_suspend_rst5 { + /* RESET 5 */ + mux { + pins = "gpio118"; + function = "gpio"; + }; + + config { + pins = "gpio118"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst6: cam_sensor_active_rst6 { + /* RESET 6 */ + mux { + pins = "gpio108"; + function = "gpio"; + }; + + config { + pins = "gpio108"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst6: cam_sensor_suspend_rst6 { + /* RESET 6 */ + mux { + pins = "gpio108"; + function = "gpio"; + }; + + config { + pins = "gpio108"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; +}; + &soc { #address-cells = <1>; @@ -16,6 +532,387 @@ status = "ok"; }; + cam_csiphy0: qcom,csiphy0@ace4000 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.1.3", "qcom,csiphy"; + reg = < 0x0ace4000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe4000>; + interrupt-names = "CSIPHY0"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-enable-sync = <1>; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 59400 147000>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY0_CLK>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>; + src-clock-name = "csi0phytimer_clk_src"; + clock-cntl-level = "lowsvs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1@ace6000 { + cell-index = <1>; + compatible = "qcom,csiphy-v2.1.3", "qcom,csiphy"; + reg = <0xace6000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe6000>; + interrupt-names = "CSIPHY1"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-enable-sync = <1>; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 59400 147000>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY1_CLK>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>; + src-clock-name = "csi1phytimer_clk_src"; + clock-cntl-level = "lowsvs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>; + + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2@ace8000 { + cell-index = <2>; + compatible = "qcom,csiphy-v2.1.3", "qcom,csiphy"; + reg = <0xace8000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xe8000>; + interrupt-names = "CSIPHY2"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-enable-sync = <1>; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 59400 147000>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY2_CLK>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>; + src-clock-name = "csi2phytimer_clk_src"; + clock-cntl-level = "lowsvs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3@acea000 { + cell-index = <3>; + compatible = "qcom,csiphy-v2.1.3", "qcom,csiphy"; + reg = <0xacea000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xea000>; + interrupt-names = "CSIPHY3"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-enable-sync = <1>; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 59400 147000>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY3_CLK>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>; + src-clock-name = "csi3phytimer_clk_src"; + clock-cntl-level = "lowsvs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy4: qcom,csiphy4@acec000 { + cell-index = <4>; + compatible = "qcom,csiphy-v2.1.3", "qcom,csiphy"; + reg = <0xacec000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xec000>; + interrupt-names = "CSIPHY4"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-enable-sync = <1>; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 59400 147000>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy4_clk", + "csi4phytimer_clk_src", + "csi4phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY4_CLK>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI4PHYTIMER_CLK>; + src-clock-name = "csi4phytimer_clk_src"; + clock-cntl-level = "lowsvs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy5: qcom,csiphy5@acee000 { + cell-index = <5>; + compatible = "qcom,csiphy-v2.1.3", "qcom,csiphy"; + reg = <0xacee000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0xee000>; + interrupt-names = "CSIPHY5"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L6B>; + csi-vdd-0p9-supply = <&L5B>; + rgltr-cntrl-support; + rgltr-enable-sync = <1>; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1248000 912000>; + rgltr-load-current = <0 59400 147000>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy5_clk", + "csi5phytimer_clk_src", + "csi5phytimer_clk"; + clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSIPHY5_CLK>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, + <&clock_camcc CAM_CC_CSI5PHYTIMER_CLK>; + src-clock-name = "csi5phytimer_clk_src"; + clock-cntl-level = "lowsvs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0@ac15000 { + cell-index = <0>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac15000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x15000>; + interrupt-names = "cci0"; + interrupts = ; + regulator-names = "gdscr"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cci_0_clk_src", + "cci_0_clk"; + clocks = <&clock_camcc CAM_CC_CCI_0_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_0_CLK>; + clock-rates = <37500000 0>; + clock-cntl-level = "lowsvs"; + src-clock-name = "cci_0_clk_src"; + pctrl-idx-mapping = ; + pctrl-map-names = "m0", "m1"; + pinctrl-names = "m0_active", "m0_suspend", + "m1_active", "m1_suspend"; + pinctrl-0 = <&cci0_active>; + pinctrl-1 = <&cci0_suspend>; + pinctrl-2 = <&cci1_active>; + pinctrl-3 = <&cci1_suspend>; + status = "ok"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <1>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1@ac16000 { + cell-index = <1>; + compatible = "qcom,cci", "simple-bus"; + reg = <0xac16000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x16000>; + interrupt-names = "cci1"; + interrupts = ; + regulator-names = "gdscr"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cci_1_clk_src", + "cci_1_clk"; + clocks = <&clock_camcc CAM_CC_CCI_1_CLK_SRC>, + <&clock_camcc CAM_CC_CCI_1_CLK>; + clock-rates = <37500000 0>; + clock-cntl-level = "lowsvs"; + src-clock-name = "cci_1_clk_src"; + pctrl-idx-mapping = ; + pctrl-map-names = "m0", "m1"; + pinctrl-names = "m0_active", "m0_suspend", + "m1_active", "m1_suspend"; + pinctrl-0 = <&cci2_active>; + pinctrl-1 = <&cci2_suspend>; + pinctrl-2 = <&cci3_active>; + pinctrl-3 = <&cci3_suspend>; + status = "ok"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <1>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + qcom,cam_smmu { compatible = "qcom,msm-cam-smmu", "simple-bus"; status = "ok"; @@ -1513,6 +2410,87 @@ status = "ok"; }; + cam_csiphy_tpg13: qcom,tpg13@acf6000 { + cell-index = <13>; + phy-id = <0>; + compatible = "qcom,cam-tpg103"; + reg-names = "tpg0", "cam_cpas_top"; + reg = <0xacf6000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf6000 0x13000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg0"; + interrupts = ; + shared-clks = <1 0>; + clock-names = + "cphy_rx_clk_src", + "csid_csiphy_rx_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <400000000 0>, + <480000000 0>; + clock-cntl-level = "lowsvs", "nominal"; + src-clock-name = "cphy_rx_clk_src"; + status = "ok"; + }; + + cam_csiphy_tpg14: qcom,tpg14@acf7000 { + cell-index = <14>; + phy-id = <1>; + compatible = "qcom,cam-tpg103"; + reg-names = "tpg1", "cam_cpas_top"; + reg = <0xacf7000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf7000 0x13000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg1"; + interrupts = ; + shared-clks = <1 0>; + clock-names = + "cphy_rx_clk_src", + "csid_csiphy_rx_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <400000000 0>, + <480000000 0>; + clock-cntl-level = "lowsvs", "nominal"; + src-clock-name = "cphy_rx_clk_src"; + status = "ok"; + }; + + cam_csiphy_tpg15: qcom,tpg15@acf8000 { + cell-index = <15>; + phy-id = <2>; + compatible = "qcom,cam-tpg103"; + reg-names = "tpg2", "cam_cpas_top"; + reg = <0xacf8000 0x400>, + <0xac13000 0x1000>; + reg-cam-base = <0xf8000 0x13000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg2"; + interrupts = ; + shared-clks = <1 0>; + clock-names = + "cphy_rx_clk_src", + "csid_csiphy_rx_clk"; + clocks = + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&clock_camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <400000000 0>, + <480000000 0>; + clock-cntl-level = "lowsvs", "nominal"; + src-clock-name = "cphy_rx_clk_src"; + status = "ok"; + }; + qcom,cam-icp { compatible = "qcom,cam-icp"; compat-hw-name = "qcom,lx7", diff --git a/config/waipio.mk b/config/waipio.mk index daa6f375..63f17c9b 100644 --- a/config/waipio.mk +++ b/config/waipio.mk @@ -6,3 +6,5 @@ dtbo-$(CONFIG_ARCH_WAIPIO) += waipio-camera-overlay-v2.dtbo \ dtbo-$(CONFIG_ARCH_DIWALI) += diwali-camera.dtbo dtbo-$(CONFIG_ARCH_CAPE) += cape-camera.dtbo +dtbo-$(CONFIG_ARCH_CAPE) += cape-camera-sensor-mtp.dtbo \ + cape-camera-sensor-cdp.dtbo