From c54eff312e69a0064936ee8743f1e038a4e5387c Mon Sep 17 00:00:00 2001
From: Jigar Agrawal <jigar@quicinc.com>
Date: Wed, 3 Nov 2021 11:39:20 -0700
Subject: [PATCH] dt-bindings: camera: Update the binding document

Update ife, csid and sfe dtsi binding document
for rt-wrapper-base property.

CRs-Fixed: 3068951
Change-Id: I8382b284c4bcd7c0db345e722f259be079c7c56a
---
 bindings/msm-cam-ife-csid.txt | 13 +++++++++----
 bindings/msm-cam-sfe.txt      | 13 +++++++++----
 bindings/msm-cam-vfe.txt      | 13 +++++++++----
 3 files changed, 27 insertions(+), 12 deletions(-)

diff --git a/bindings/msm-cam-ife-csid.txt b/bindings/msm-cam-ife-csid.txt
index a8e78cf3..71480304 100644
--- a/bindings/msm-cam-ife-csid.txt
+++ b/bindings/msm-cam-ife-csid.txt
@@ -42,6 +42,11 @@ First Level Node - CAM IFE CSID device
   Value type: <u32>
   Definition: List of bases.
 
+- rt-wrapper-base
+  Usage: required
+  Value type: u32
+  Definition: Titan offset of start of the RT Wrapper.
+
 - interrupt-names
   Usage: Required
   Value type: <string>
@@ -103,11 +108,11 @@ Example:
 cam_csid0: qcom,csid0@acb7000 {
 	cell-index = <0>;
 	compatible = "qcom,csid680";
-	reg-names = "csid", "csid_top", "rt_wrapper";
+	reg-names = "csid", "csid_top";
 	reg = <0xacb7000 0xd00>,
-		<0xacb6000 0x1000>,
-		<0xac62000 0x64000>;
-	reg-cam-base = <0xb7000 0xb6000 0x62000>;
+		<0xacb6000 0x1000>;
+	reg-cam-base = <0xb7000 0xb6000>;
+	rt-wrapper-base = <0x62000>;
 	interrupt-names = "csid";
 	interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>;
 	regulator-names = "camss";
diff --git a/bindings/msm-cam-sfe.txt b/bindings/msm-cam-sfe.txt
index 5942a5eb..607bf02d 100644
--- a/bindings/msm-cam-sfe.txt
+++ b/bindings/msm-cam-sfe.txt
@@ -40,6 +40,11 @@ Required properties:
   Value type: <u32>
   Definition: List of bases.
 
+- rt-wrapper-base
+  Usage: required
+  Value type: u32
+  Definition: Titan offset of start of the RT Wrapper.
+
 - interrupt-names
   Usage: Required
   Value type: <string>
@@ -100,10 +105,10 @@ Example:
 cam_sfe0: qcom,sfe0@ac9e000 {
 	cell-index = <0>;
 	compatible = "qcom,sfe680";
-	reg-names = "sfe0", "rt_wrapper";
-	reg = <0xac9e000 0x8000>,
-		<0xac62000 0x64000>;
-	reg-cam-base = <0x9e000 0x62000>;
+	reg-names = "sfe0";
+	reg = <0xac9e000 0x8000>;
+	reg-cam-base = <0x9e000>;
+	rt-wrapper-base = <0x62000>;
 	interrupt-names = "sfe";
 	interrupts = <GIC_SPI 462 IRQ_TYPE_EDGE_RISING>;
 	regulator-names = "camss", "sfe0";
diff --git a/bindings/msm-cam-vfe.txt b/bindings/msm-cam-vfe.txt
index c373efe2..e5ed65d6 100644
--- a/bindings/msm-cam-vfe.txt
+++ b/bindings/msm-cam-vfe.txt
@@ -44,6 +44,11 @@ Required properties:
   Value type: <u32>
   Definition: List of bases.
 
+- rt-wrapper-base
+  Usage: required
+  Value type: u32
+  Definition: Titan offset of start of the RT Wrapper.
+
 - interrupt-names
   Usage: Required
   Value type: <string>
@@ -131,11 +136,11 @@ Example:
 cam_vfe0: qcom,ife0@ac62000 {
 	cell-index = <0>;
 	compatible = "qcom,vfe680";
-	reg-names = "ife", "cam_camnoc", "rt_wrapper";
+	reg-names = "ife", "cam_camnoc";
 	reg = <0xac62000 0xF000>,
-		<0xac19000 0x9000>,
-		<0xac62000 0x64000>;
-	reg-cam-base = <0x62000 0x19000 0x62000>;
+		<0xac19000 0x9000>;
+	reg-cam-base = <0x62000 0x19000>;
+	rt-wrapper-base = <0x62000>;
 	interrupt-names = "ife";
 	interrupts = <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>;
 	regulator-names = "camss", "ife0";