From 72dfc503c4535276e14fb1acd1eeb15cbbf36b07 Mon Sep 17 00:00:00 2001
From: Yue Liu <yueliu@qti.qualcomm.com>
Date: Tue, 8 Nov 2022 18:54:10 +0800
Subject: [PATCH 1/4] ARM: dts: qcom: Add APQ variant device trees for Ravelin

Add APQ variant device trees for Ravelin SoC.

Change-Id: Ia9779136c302ce7b9a2792af06bcd35a9bfa82ca
---
 bindings/arm/msm/msm.txt                      |  5 ++++-
 qcom/Makefile                                 | 21 ++++++++++++-------
 qcom/ravelin-atp-overlay.dts                  |  2 +-
 qcom/ravelin-idp-4gb-overlay.dts              |  2 +-
 qcom/ravelin-idp-overlay.dts                  |  2 +-
 ...ravelin-idp-wcn3950-amoled-rcm-overlay.dts |  2 +-
 qcom/ravelin-idp-wcn3988-overlay.dts          |  2 +-
 qcom/ravelin-qrd-4gb-overlay.dts              |  2 +-
 qcom/ravelin-qrd-overlay.dts                  |  2 +-
 qcom/ravelinp-4gb.dts                         |  9 ++++++++
 qcom/ravelinp-4gb.dtsi                        |  6 ++++++
 qcom/ravelinp-atp.dts                         | 10 +++++++++
 qcom/ravelinp-atp.dtsi                        |  1 +
 qcom/ravelinp-idp-4gb.dts                     | 10 +++++++++
 qcom/ravelinp-idp-4gb.dtsi                    |  1 +
 qcom/ravelinp-idp-wcn3950-amoled-rcm.dts      | 10 +++++++++
 qcom/ravelinp-idp-wcn3950-amoled-rcm.dtsi     |  1 +
 qcom/ravelinp-idp-wcn3988.dts                 | 10 +++++++++
 qcom/ravelinp-idp-wcn3988.dtsi                |  1 +
 qcom/ravelinp-idp.dts                         | 10 +++++++++
 qcom/ravelinp-idp.dtsi                        |  1 +
 qcom/ravelinp-qrd-4gb.dts                     | 10 +++++++++
 qcom/ravelinp-qrd-4gb.dtsi                    |  1 +
 qcom/ravelinp-qrd.dts                         | 11 ++++++++++
 qcom/ravelinp-qrd.dtsi                        |  1 +
 qcom/ravelinp.dts                             | 10 +++++++++
 qcom/ravelinp.dtsi                            | 10 +++++++++
 27 files changed, 138 insertions(+), 15 deletions(-)
 create mode 100644 qcom/ravelinp-4gb.dts
 create mode 100644 qcom/ravelinp-4gb.dtsi
 create mode 100644 qcom/ravelinp-atp.dts
 create mode 100644 qcom/ravelinp-atp.dtsi
 create mode 100644 qcom/ravelinp-idp-4gb.dts
 create mode 100644 qcom/ravelinp-idp-4gb.dtsi
 create mode 100644 qcom/ravelinp-idp-wcn3950-amoled-rcm.dts
 create mode 100644 qcom/ravelinp-idp-wcn3950-amoled-rcm.dtsi
 create mode 100644 qcom/ravelinp-idp-wcn3988.dts
 create mode 100644 qcom/ravelinp-idp-wcn3988.dtsi
 create mode 100644 qcom/ravelinp-idp.dts
 create mode 100644 qcom/ravelinp-idp.dtsi
 create mode 100644 qcom/ravelinp-qrd-4gb.dts
 create mode 100644 qcom/ravelinp-qrd-4gb.dtsi
 create mode 100644 qcom/ravelinp-qrd.dts
 create mode 100644 qcom/ravelinp-qrd.dtsi
 create mode 100644 qcom/ravelinp.dts
 create mode 100644 qcom/ravelinp.dtsi

diff --git a/bindings/arm/msm/msm.txt b/bindings/arm/msm/msm.txt
index f9a5236a..be55ae31 100644
--- a/bindings/arm/msm/msm.txt
+++ b/bindings/arm/msm/msm.txt
@@ -108,7 +108,7 @@ SoCs:
   compatible = "qcom,anorak"
 
 - RAVELIN
-  compatible = "qcom,ravelin"
+  compatible = "qcom,ravelin", "qcom,ravelinp"
 
 - MONTAGUE
   compatible = "qcom,montague", "qcom,montaguep"
@@ -318,6 +318,9 @@ compatible = "qcom,ravelin-rumi"
 compatible = "qcom,ravelin-atp"
 compatible = "qcom,ravelin-idp"
 compatible = "qcom,ravelin-qrd"
+compatible = "qcom,ravelinp-atp"
+compatible = "qcom,ravelinp-idp"
+compatible = "qcom,ravelinp-qrd"
 compatible = "qcom,montague-rumi"
 compatible = "qcom,montague-idp"
 compatible = "qcom,montague-qrd"
diff --git a/qcom/Makefile b/qcom/Makefile
index 3f412f86..6878ecb5 100644
--- a/qcom/Makefile
+++ b/qcom/Makefile
@@ -502,13 +502,13 @@ dtbo-$(CONFIG_ARCH_RAVELIN) += ravelin-rumi-overlay.dtbo \
 	montague-rcm-overlay.dtbo
 
 ravelin-rumi-overlay.dtbo-base := ravelin.dtb
-ravelin-atp-overlay.dtbo-base := ravelin.dtb
-ravelin-idp-overlay.dtbo-base := ravelin.dtb
-ravelin-idp-wcn3988-overlay.dtbo-base := ravelin.dtb
-ravelin-idp-wcn3950-amoled-rcm-overlay.dtbo-base := ravelin.dtb
-ravelin-qrd-overlay.dtbo-base := ravelin.dtb
-ravelin-idp-4gb-overlay.dtbo-base := ravelin-4gb.dtb
-ravelin-qrd-4gb-overlay.dtbo-base := ravelin-4gb.dtb
+ravelin-atp-overlay.dtbo-base := ravelin.dtb ravelinp.dtb
+ravelin-idp-overlay.dtbo-base := ravelin.dtb ravelinp.dtb
+ravelin-idp-wcn3988-overlay.dtbo-base := ravelin.dtb ravelinp.dtb
+ravelin-idp-wcn3950-amoled-rcm-overlay.dtbo-base := ravelin.dtb ravelinp.dtb
+ravelin-qrd-overlay.dtbo-base := ravelin.dtb ravelinp.dtb
+ravelin-idp-4gb-overlay.dtbo-base := ravelin-4gb.dtb ravelinp-4gb.dtb
+ravelin-qrd-4gb-overlay.dtbo-base := ravelin-4gb.dtb ravelinp-4gb.dtb
 montague-rumi-overlay.dtbo-base := montague.dtb montaguep.dtb
 montague-qrd-overlay.dtbo-base := montague.dtb montaguep.dtb
 montague-hsp-overlay.dtbo-base := montague.dtb montaguep.dtb
@@ -523,6 +523,13 @@ dtb-$(CONFIG_ARCH_RAVELIN) += ravelin-rumi.dtb \
 	ravelin-qrd.dtb \
 	ravelin-idp-4gb.dtb \
 	ravelin-qrd-4gb.dtb \
+	ravelinp-atp.dtb \
+	ravelinp-idp.dtb \
+	ravelinp-idp-wcn3988.dtb \
+	ravelinp-idp-wcn3950-amoled-rcm.dtb \
+	ravelinp-qrd.dtb \
+	ravelinp-idp-4gb.dtb \
+	ravelinp-qrd-4gb.dtb \
 	montague-rumi.dtb \
 	montague-qrd.dtb \
 	montague-hsp.dtb \
diff --git a/qcom/ravelin-atp-overlay.dts b/qcom/ravelin-atp-overlay.dts
index 6acb9fce..84ada1b2 100644
--- a/qcom/ravelin-atp-overlay.dts
+++ b/qcom/ravelin-atp-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin ATP";
 	compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp";
-	qcom,msm-id = <568 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <33 0>;
 };
diff --git a/qcom/ravelin-idp-4gb-overlay.dts b/qcom/ravelin-idp-4gb-overlay.dts
index 45c88a0e..e104ba19 100644
--- a/qcom/ravelin-idp-4gb-overlay.dts
+++ b/qcom/ravelin-idp-4gb-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin IDP 4GB DDR";
 	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <34 0x600>;
 };
diff --git a/qcom/ravelin-idp-overlay.dts b/qcom/ravelin-idp-overlay.dts
index f8f59a40..99bcbf05 100644
--- a/qcom/ravelin-idp-overlay.dts
+++ b/qcom/ravelin-idp-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin IDP";
 	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <34 0>;
 };
diff --git a/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts b/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts
index f7a3f024..3ea7cf33 100644
--- a/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts
+++ b/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin WCN3950 IDP + AMOLED + RCM";
 	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <34 2>;
 };
diff --git a/qcom/ravelin-idp-wcn3988-overlay.dts b/qcom/ravelin-idp-wcn3988-overlay.dts
index b67030de..d3051566 100644
--- a/qcom/ravelin-idp-wcn3988-overlay.dts
+++ b/qcom/ravelin-idp-wcn3988-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin IDP + WCN3988";
 	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <34 1>;
 };
diff --git a/qcom/ravelin-qrd-4gb-overlay.dts b/qcom/ravelin-qrd-4gb-overlay.dts
index 8ec9e13f..75e7f3bf 100644
--- a/qcom/ravelin-qrd-4gb-overlay.dts
+++ b/qcom/ravelin-qrd-4gb-overlay.dts
@@ -6,6 +6,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin QRD 4GB DDR";
 	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
-	qcom,msm-id = <568 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <0x1000B 0x600>;
 };
diff --git a/qcom/ravelin-qrd-overlay.dts b/qcom/ravelin-qrd-overlay.dts
index 5cb39477..a8559cea 100644
--- a/qcom/ravelin-qrd-overlay.dts
+++ b/qcom/ravelin-qrd-overlay.dts
@@ -6,7 +6,7 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin QRD";
 	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
-	qcom,msm-id = <568 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <0x1000B 0>;
 };
 
diff --git a/qcom/ravelinp-4gb.dts b/qcom/ravelinp-4gb.dts
new file mode 100644
index 00000000..2321e25b
--- /dev/null
+++ b/qcom/ravelinp-4gb.dts
@@ -0,0 +1,9 @@
+/dts-v1/;
+
+#include "ravelinp-4gb.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP 4Gb SoC";
+	compatible = "qcom,ravelinp";
+	qcom,board-id = <0 0x600>;
+};
diff --git a/qcom/ravelinp-4gb.dtsi b/qcom/ravelinp-4gb.dtsi
new file mode 100644
index 00000000..70830f95
--- /dev/null
+++ b/qcom/ravelinp-4gb.dtsi
@@ -0,0 +1,6 @@
+#include "ravelinp.dtsi"
+/ {
+};
+
+&soc {
+};
diff --git a/qcom/ravelinp-atp.dts b/qcom/ravelinp-atp.dts
new file mode 100644
index 00000000..50ea6ac6
--- /dev/null
+++ b/qcom/ravelinp-atp.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp.dtsi"
+#include "ravelinp-atp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP ATP";
+	compatible = "qcom,ravelinp-atp", "qcom,ravelinp", "qcom,atp";
+	qcom,board-id = <33 0>;
+};
diff --git a/qcom/ravelinp-atp.dtsi b/qcom/ravelinp-atp.dtsi
new file mode 100644
index 00000000..947022eb
--- /dev/null
+++ b/qcom/ravelinp-atp.dtsi
@@ -0,0 +1 @@
+#include "ravelin-atp.dtsi"
diff --git a/qcom/ravelinp-idp-4gb.dts b/qcom/ravelinp-idp-4gb.dts
new file mode 100644
index 00000000..61246ae4
--- /dev/null
+++ b/qcom/ravelinp-idp-4gb.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp-4gb.dtsi"
+#include "ravelinp-idp-4gb.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP IDP 4GB DDR";
+	compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp";
+	qcom,board-id = <0x34 0x600>;
+};
diff --git a/qcom/ravelinp-idp-4gb.dtsi b/qcom/ravelinp-idp-4gb.dtsi
new file mode 100644
index 00000000..b71ee48e
--- /dev/null
+++ b/qcom/ravelinp-idp-4gb.dtsi
@@ -0,0 +1 @@
+#include "ravelin-idp.dtsi"
diff --git a/qcom/ravelinp-idp-wcn3950-amoled-rcm.dts b/qcom/ravelinp-idp-wcn3950-amoled-rcm.dts
new file mode 100644
index 00000000..809d743e
--- /dev/null
+++ b/qcom/ravelinp-idp-wcn3950-amoled-rcm.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp.dtsi"
+#include "ravelinp-idp-wcn3950-amoled-rcm.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP WCN3950 IDP + AMOLED + RCM";
+	compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp";
+	qcom,board-id = <34 2>;
+};
diff --git a/qcom/ravelinp-idp-wcn3950-amoled-rcm.dtsi b/qcom/ravelinp-idp-wcn3950-amoled-rcm.dtsi
new file mode 100644
index 00000000..6c5d0d3d
--- /dev/null
+++ b/qcom/ravelinp-idp-wcn3950-amoled-rcm.dtsi
@@ -0,0 +1 @@
+#include "ravelin-idp-wcn3950-amoled-rcm.dtsi"
diff --git a/qcom/ravelinp-idp-wcn3988.dts b/qcom/ravelinp-idp-wcn3988.dts
new file mode 100644
index 00000000..ac9b3515
--- /dev/null
+++ b/qcom/ravelinp-idp-wcn3988.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp.dtsi"
+#include "ravelinp-idp-wcn3988.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP IDP + WCN3988";
+	compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp";
+	qcom,board-id = <34 1>;
+};
diff --git a/qcom/ravelinp-idp-wcn3988.dtsi b/qcom/ravelinp-idp-wcn3988.dtsi
new file mode 100644
index 00000000..6a293c7b
--- /dev/null
+++ b/qcom/ravelinp-idp-wcn3988.dtsi
@@ -0,0 +1 @@
+#include "ravelin-idp-wcn3988.dtsi"
diff --git a/qcom/ravelinp-idp.dts b/qcom/ravelinp-idp.dts
new file mode 100644
index 00000000..66ff9807
--- /dev/null
+++ b/qcom/ravelinp-idp.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp.dtsi"
+#include "ravelinp-idp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP IDP";
+	compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp";
+	qcom,board-id = <34 0>;
+};
diff --git a/qcom/ravelinp-idp.dtsi b/qcom/ravelinp-idp.dtsi
new file mode 100644
index 00000000..b71ee48e
--- /dev/null
+++ b/qcom/ravelinp-idp.dtsi
@@ -0,0 +1 @@
+#include "ravelin-idp.dtsi"
diff --git a/qcom/ravelinp-qrd-4gb.dts b/qcom/ravelinp-qrd-4gb.dts
new file mode 100644
index 00000000..08255136
--- /dev/null
+++ b/qcom/ravelinp-qrd-4gb.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp-4gb.dtsi"
+#include "ravelinp-qrd-4gb.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP QRD 4GB DDR";
+	compatible = "qcom,ravelinp-qrd", "qcom,ravelinp", "qcom,qrd";
+	qcom,board-id = <0x1000B 0x600>;
+};
diff --git a/qcom/ravelinp-qrd-4gb.dtsi b/qcom/ravelinp-qrd-4gb.dtsi
new file mode 100644
index 00000000..76ba1b70
--- /dev/null
+++ b/qcom/ravelinp-qrd-4gb.dtsi
@@ -0,0 +1 @@
+#include "ravelin-qrd.dtsi"
diff --git a/qcom/ravelinp-qrd.dts b/qcom/ravelinp-qrd.dts
new file mode 100644
index 00000000..740bcdf1
--- /dev/null
+++ b/qcom/ravelinp-qrd.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+
+#include "ravelinp.dtsi"
+#include "ravelinp-qrd.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP QRD";
+	compatible = "qcom,ravelinp-qrd", "qcom,ravelinp", "qcom,qrd";
+	qcom,board-id = <0x1000B 0>;
+};
+
diff --git a/qcom/ravelinp-qrd.dtsi b/qcom/ravelinp-qrd.dtsi
new file mode 100644
index 00000000..76ba1b70
--- /dev/null
+++ b/qcom/ravelinp-qrd.dtsi
@@ -0,0 +1 @@
+#include "ravelin-qrd.dtsi"
diff --git a/qcom/ravelinp.dts b/qcom/ravelinp.dts
new file mode 100644
index 00000000..6ae75427
--- /dev/null
+++ b/qcom/ravelinp.dts
@@ -0,0 +1,10 @@
+/dts-v1/;
+
+#include "ravelinp.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP SoC";
+	compatible = "qcom,ravelinp";
+	qcom,board-id = <0 0>;
+};
+
diff --git a/qcom/ravelinp.dtsi b/qcom/ravelinp.dtsi
new file mode 100644
index 00000000..d7770514
--- /dev/null
+++ b/qcom/ravelinp.dtsi
@@ -0,0 +1,10 @@
+#include "ravelin.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. RavelinP";
+	compatible = "qcom,ravelinp";
+	qcom,msm-id = <602 0x10000>;
+};
+
+&ipa_hw {
+	status = "disabled";
+};

From 9ab803fd4b21fdcc5155c6e4171a867f294156a8 Mon Sep 17 00:00:00 2001
From: Yue Liu <yueliu@qti.qualcomm.com>
Date: Thu, 10 Nov 2022 14:28:52 +0800
Subject: [PATCH 2/4] ARM: dts: msm: Disable VM for Ravelin 4Gb variant

Disable VM for Ravelin 4Gb variant.

Change-Id: I45d2cecfb3a51aaaa16ddffc6f402783ddc5e13a
---
 qcom/ravelin-low-memory.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 qcom/ravelin-low-memory.dtsi

diff --git a/qcom/ravelin-low-memory.dtsi b/qcom/ravelin-low-memory.dtsi
new file mode 100644
index 00000000..2d758046
--- /dev/null
+++ b/qcom/ravelin-low-memory.dtsi
@@ -0,0 +1,13 @@
+&soc {
+	qcom,guestvm_loader@e0b00000 {
+		status = "disabled";
+	};
+
+	qrtr-gunyah {
+		status = "disabled";
+	};
+
+	qcom,virtio_backend@0 {
+		status = "disabled";
+	};
+};

From f926818f7937fbbce377c34768852b421d551adf Mon Sep 17 00:00:00 2001
From: Yue Liu <yueliu@qti.qualcomm.com>
Date: Thu, 10 Nov 2022 14:15:55 +0800
Subject: [PATCH 3/4] ARM: dts: msm: Remove VM memory carveout for revelin 4gb
 variant

Remove VM memory carveout for 4gb variant.

Change-Id: I55eabe0abddccc89ff0f33fc43b994eb37883aaf
---
 qcom/ravelin-4gb.dtsi        |  1 +
 qcom/ravelin-low-memory.dtsi | 16 ++++++++++++++++
 qcom/ravelinp-4gb.dtsi       |  1 +
 3 files changed, 18 insertions(+)

diff --git a/qcom/ravelin-4gb.dtsi b/qcom/ravelin-4gb.dtsi
index 4a2add1a..ff775a71 100644
--- a/qcom/ravelin-4gb.dtsi
+++ b/qcom/ravelin-4gb.dtsi
@@ -1,4 +1,5 @@
 #include "ravelin.dtsi"
+#include "ravelin-low-memory.dtsi"
 / {
 };
 
diff --git a/qcom/ravelin-low-memory.dtsi b/qcom/ravelin-low-memory.dtsi
index 2d758046..9f8d5ff4 100644
--- a/qcom/ravelin-low-memory.dtsi
+++ b/qcom/ravelin-low-memory.dtsi
@@ -1,3 +1,19 @@
+&trust_ui_vm_mem {
+	status = "disabled";
+};
+
+&trust_ui_vm_qrtr {
+	status = "disabled";
+};
+
+&trust_ui_vm_vblk0_ring {
+	status = "disabled";
+};
+
+&trust_ui_vm_swiotlb {
+	status = "disabled";
+};
+
 &soc {
 	qcom,guestvm_loader@e0b00000 {
 		status = "disabled";
diff --git a/qcom/ravelinp-4gb.dtsi b/qcom/ravelinp-4gb.dtsi
index 70830f95..22b7f56f 100644
--- a/qcom/ravelinp-4gb.dtsi
+++ b/qcom/ravelinp-4gb.dtsi
@@ -1,4 +1,5 @@
 #include "ravelinp.dtsi"
+#include "ravelin-low-memory.dtsi"
 / {
 };
 

From 5e04652615802b6f14cf142eda0e07657b86102e Mon Sep 17 00:00:00 2001
From: Mahadevan <mahap@qti.qualcomm.com>
Date: Mon, 14 Nov 2022 13:07:31 +0530
Subject: [PATCH 4/4] ARM: dts: msm: remove display carveout heap for ravelin
 4gb variant

Remove display carveout heap region for ravelin 4gb variant.

Change-Id: Ie6cf88b159834f5cdf0c85d56bfbd5964777dba8
---
 qcom/ravelin-low-memory.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/qcom/ravelin-low-memory.dtsi b/qcom/ravelin-low-memory.dtsi
index 9f8d5ff4..dfa40318 100644
--- a/qcom/ravelin-low-memory.dtsi
+++ b/qcom/ravelin-low-memory.dtsi
@@ -14,6 +14,14 @@
 	status = "disabled";
 };
 
+&non_secure_display_dma_buf {
+	status = "disabled";
+};
+
+&non_secure_display_memory {
+	status = "disabled";
+};
+
 &soc {
 	qcom,guestvm_loader@e0b00000 {
 		status = "disabled";