Merge tag 'kernel.lnx.5.4-200305.1' into msm-waipio

* tag 'kernel.lnx.5.4-200305.1':
  ARM: dts: msm:  Add the CX GDSC to the IOMMU device
  ARM: dts: msm: Move IOMMU clocks to the GPU device
  ARM: dts: msm: Enable USB secondary port on Lahaina
  bindings: power: supply: Add thermal mitigation for qcom,battery-charger
  ARM: dts: msm: Add dummy clock nodes for clock controllers for SHIMA
  ARM: dts: msm: enable haptics for Lahaina QRD
  ARM: dts: msm: Update S12B and S1C voltages
  ARM: dts: msm: add support for dynamic port map
  ARM: dts: msm: add wil6210 pinctrl configurations for Lahaina
  ARM: dts: msm: Add NFC I3C device node for Lahaina
  ARM: dts: msm: Enable SD card support on Lahaina
  ARM: dts: msm: Add SD card bus voting details for Lahaina
  ARM: dts: msm: Add CVP AXI reset pulse
  ARM: dts: msm: Add stub regulators for shima
  ARM: dts: msm: add route between va and swr dmic's
  Revert "ARM: dts: msm: remove hdmi codec enable"
  ARM: dts: msm: update SWR_DMIC to 0 on Lahaina QRD device
  ARM: dts: msm: Mark APPS SMMU interconnect votes as active-only
  dt-bindings: Document qcom,active-only
  ARM: dts: qcom: Update trusted vm DT entries
  ARM: dts: msm: Add pinctrl node for TLMM on Shima SoC
  bindings: pinctrl: Add device-tree bindings for Shima pinctrl driver
  ARM: dts: msm: Add initial device tree for Shima
  ARM: dts: msm: Correct cmb size of turing llm turing for lahaina
  ARM: dts: msm: add DMIC DT node for QRD DMIC device
  ARM: dts: msm: Add camera device tree inclusions for Lahaina
  ARM: dts: qcom: specify ADC channels for Lahaina PMIC temp-alarm devices
  ARM: dts: msm: Update devicetree to enable FM on lahaina
  ARM: dts: msm: Add ADC support for Lahaina
  ARM: dts: msm: set PMIC thermal zone trip points to critical for Lahaina
  ARM: dts: msm: Update S12B and S1C voltages
  ARM: dts: msm: Add fix for SW_CTRL mapped to wrong GPIO66 on MSM side
  ARM: dts: msm: remove hdmi codec enable
  ARM: dts: msm: add external audio codec
  ARM: dts: msm: Correct the interconnect names node
  ARM: dts: msm: Open up gpu power levels upto NOM
  ARM: dts: msm: Add hwkm node for lahaina
  bindings: Add device-tree bindings for hwkm driver
  ARM: dts: msm: Add camera device tree inclusions for Lahaina
  ARM: dts: msm: Add WLAN updates to HSP DTSI overlays
  ARM: dts: msm: Add ICE region for UFS
  ARM: dts: msm: update PCIe0 and PCIe1 PHY for lahaina v1
  ARM: dts: msm: Fix FM chip ON issue
  ARM: dts: msm: Add snapshot of memshare dt documentation
  ARM: dts: msm: Add support for FM in lahaina platform
  dt-bindings: thermal: qcom-adc-tm: add PMIC7 ADC_TM_IIO compatible string
  dt-bindings: msm: add snapshot of msm_11ad doc
  ARM: dts: msm: add swr dmics as aux dev
  ARM: dts: msm: Update CNSS S12B voltage level to 1.35v
  ARM: dts: msm: Update soundwire DMIC configuration on Lahaina
  ARM: dts: msm: update PCIe0 and PCIe1 CLKREQ default func select on lahaina
  ARM: dts: msm: Add dt node for Focaltech touch IC
  ARM: dts: msm: Add tpdm lpass lpi for lahaina
  ARM: dts: msm: Add cti trig_out gpio for Lahaina
  ARM: dts: msm: Add dt node for ST Micro touch IC
  ARM: dts: msm: add gpio pincntrl for touch
  ARM: dts: msm: fix DSI reset gpio pincntrl
  ARM: dts: msm: update audio dt node for lahaina qrd device
  ARM: dts: qcom: Add regulator changes for Lahaina
  ARM: dts: msm: Reorganize the pinctrl node
  ARM: dts: qcom: Rename lahaina-svm1 to trustedvm
  ARM: dts: msm: update i2c slave address for fsa4480 on Lahaina
  ARM: dts: msm: Add a new device tree file for HSP configuration
  ARM: dts: msm: Add VBUS/ID configuration for USB secondary port on Lahaina
  ARM: dts: msm: update audio device tree on lahaina
  ARM: dts: msm: Add usb_audio_qmi_dev node
  ARM: dts: msm: Fix the gem_noc node address and reg size
  ARM: dts: msm: Disable tpdm shrm for Lahaina
  ARM: dts: msm: Enable turing llm tpdm for lahaina
  ARM: dts: msm: Add mem_dump node for lahaina
  ARM: dts: msm: disable second USB port for Lahaina QRD
  dt-bindings: haven: Add bindings for qcom,vm-1.0
  ARM: dts: msm: Rectify I3C node DT properties
  ARM: dts: qcom: add flash/torch LEDs on PM8350C for Lahaina platforms
  ARM: dts: msm: Disable USB secondary port on Lahaina
  ARM: dts: qcom: Reserved GuestVM memory and add its PIL driver
  dt-bindings: Add bindings for guestvm-loader
  ARM: dts: msm: Add permittable RFA2 (min,max) voltage
  ARM: dts: msm: Limit ETR iova range for lahaina
  ARM: dts: msm: Add IPCC test nodes for end to end verification
  ARM: dts: msm: Add CNSS2 node for Lahaina
  ARM: dts: msm: Update dtsi for page recycle and cleanup
  ARM: dts: qcom: update RPMh regulator min/max voltage limits for Lahaina
  ARM: dts: msm: update PCIe L5 and L6 current vote on lahaina
  ARM: dts: msm: Add Altmode PMIC GLINK client for Lahaina
  bindings: Add altmode-glink
  ARM: dts: msm: Restrict default CMA region below 0xE0000000
  ARM: dts: qcom: add Glink SPMI debug controller device for Lahaina
  ARM: dts: msm: include display platform DT files
  bindings: spmi: add QTI Glink SPMI debug controller binding documentation
  ARM: dts: msm: add proxy votes for display regulators
  arm64: dts: qcom: Add secondary VM dts file for lahaina
  ARM: dts: msm: Correct the typo of remote-endpoint for lahaina
  ARM: dts: msm: limit gear to 3 for Lahaina
  ARM: dts: qcom: add haptics on PM8350B for Lahaina CDP/MTP
  ARM: dts: msm: Update Lahaina USB3 QMP UNI PHY init settings
  ARM: dts: msm: Hot fix for Lahaina
  ARM: dts: qcom: Link restart_reason nvmem cell to qcom,pshold
  ARM: dts: qcom: add nvmem cell for PMK8350 SDAM2 restart reason
  ARM: dts: msm: enable PCIe0 and PCIe1 on lahaina
  dt-bindings: Document the qcom,dynamic-heap binding
  dt-bindings: Add device-tree bindings for the memory sharing driver
  ARM: dts: msm: add PMIC Glink and clients for Lahaina
  ARM: dts: msm: Update fastrpc SIDs and masks
  ARM: dts: qcom: add VDD_MX and CX subnodes for MMCX dependencies on Lahaina
  ARM: dts: msm: Enable video driver
  ARM: dts: qcom: Update limit-rate and add limit-phy-submode on Lahaina
  ARM: dts: msm: set MSR range in CSR for Lahaina
  dt-bindings: extcon-usb-gpio: Document optional vbus-out-gpio
  ARM: dts: msm: Update changes for audio device tree on Lahaina
  ARM: dts: msm: Fix secondary USB port related aggre_noc clock
  ARM: dts: msm: add initial PHY sequence for PCIe0 and PCIe1 on lahaina
  ARM: dts: msm: add PCIe pipe clk mux and ext src to PCIe clock for lahaina
  ARM: dts: msm: add aggre_noc_pcie_*_axi_clk for PCIe on lahaina
  ARM: dts: msm: Add dtsi changes for qbt_handler
  dt-bindings: Add documentation for qbt_handler
  ARM: dts: msm: Add TSENS thermal nodes for lahaina
  ARM: dts: qcom: change all rpmh-regulator LDO default modes to HPM
  ARM: dts: msm: Do not create logical mappings for the secure CDSP heap
  ARM: dts: msm: Disable watchdog for Lahaina-RUMI
  ARM: dts: msm: Update the arch_timer frequency
  ARM: dts: msm: Specify address/size cells for &soc on lahaina-rumi
  dt-bindings: input: qcom-hv-haptics: Add initial binding document
  ARM: dts: msm: Add secure display heap
  ARM: dts: msm: Add alias for HSUART node
  ARM: dts: qcom: switch to I2C control of PM8008 PMIC regulators for Lahaina
  ARM: dts: msm: Include ipcc_test dtsi file in lahaina.dtsi file
  ARM: dts: msm: vidc: Add register value mask
  ARM: dts: msm: Fix ufs OCS error
  ARM: dts: msm: Fix USB PHY resets
  ARM: dts: msm: Add interconnects to USB on Lahaina
  dt-bindings: usb: Document interconnects usage for qcom,dwc-usb3-msm
  bindings: qti-flash: Fix slave id for pm8350c in DT example
  dt-bindings: Add snapshot of QPNP AMOLED regulator bindings
  bindings: soc: qcom: add QTI battery glink debug
  ARM: dts: msm: Add PWM and RGB LED devices for PM8350C
  ARM: dts: msm: add a CX, MX and MMCX Turbo level proxy request for Lahaina
  ARM: dts: qcom: update RPMh regulator voltage limits for Lahaina
  ARM: dts: msm: Add QSEE IRQ bridge entry for Lahaina
  ARM: dts: msm: Add device tree overlay for Lahaina CDP
  ARM: dts: msm: Add regulator entries for Lahaina
  ARM: dts: msm: add qcom,fastrpc-gids property on Lahaina
  ARM: dts: msm: Update supply routing for swr dmic on Lahaina
  bindings: pinctrl: Add device-tree bindings for Lahaina pinctrl driver
  ARM: dts: msm: add display sde nodes to target dtsi
  ARM: dts: msm: Replace swr dmic mic bias number on Lahaina
  bindings: Documentation: Update swr mic device tree documentation
  ARM: dts: msm: Add and enable disp rsc support for Lahaina
  ARM: dts: msm: add proxy consumers for L5B and L6B regulators on Lahaina
  dt-bindings: regulator: add rpmh-regulator bindings
  dt-bindings: regulator: add refgen regulator bindings
  ARM: dts: msm: Add SD card entries for Lahaina
  ARM: dts: msm: Add bluetooth power and slimbus slave node
  ARM: dts: msm: Add regmap and clocks for interconnects on Lahaina
  ARM: dts: msm: Add swr dmic nodes on Lahaina
  bindings: Documentation: Update swr mic device tree documentation
  bindings: Documentation: Add swr mic device tree documentation
  dt-bindings: add documentation for leds-qti-flash
  bindings: power: supply: add QTI battery charger
  ARM: dts: msm: Do not bypass SMMU for ufshc
  dt-bindings: Add dt binding for Focaltech driver
  ARM: dts: msm: fix ipa smp2p node issue
  ARM: dts: msm: Add the lahaina gpu dtsi
  ARM: dts: msm: update DPC properties for Lahaina
  ARM: dts: msm: Change the audio routing sequence
  ARM: dts: msm: add documentation qcom,tx-wrapper-cache-max-size
  ARM: dts: msm: add qcom,tx-wrapper-cache-max-size property
  ARM: dts: msm: Add the offlineable memory sizes for Lahaina
  ARM: dts: msm: Update audio device tree overlay for lahaina
  ARM: dts: msm: Add turing etm support for Lahaina
  ARM: dts: qcom: Remove UFS PHY reset control on Lahaina
  ARM: dts: msm: add pinctrl information for Lahaina target
  bindings: Documentation: Add wsa883x device tree documentation
  dt-bindings: regulator: pm8008-regulator: add OCP interrupt support
  ARM: dts: msm: Move apps_rsc before interconnect devices
  ARM: dts: msm: Set USB mode as peripheral only on Lahaina
  bindings: add audio device tree for lahaina
  bindings: Documentation: add QTI audio documentation
  ARM: dts: msm: Add USB Uni PHY related device node on Lahaina
  ARM: dts: msm: Update and enable the debug cc measure nodes
  ARM: dts: msm: Add QTI crypto device-tree node for Lahaina
  bindings: Add device-tree bindings for QTI crypto drivers
  dt-bindings: input: Add dt bindings for STMicro
  ARM: dts: qcom: Add dtsi node entry for Slimbus in lahaina
  ARM: dts: msm: use clock driver to vote for IPA code
  ARM: dts: msm: Add ACTLR settings for the APPS and GFX SMMUs
  dt-bindings: nfc: Add Documentation for I2C NFC devicetree node
  ARM: dts: msm: Fix GSI IRQ type warnings on lahaina
  dt-bindings: thermal: Add ADC_TM documentation for PMIC7
  ARM: dts: msm: Add TSENS node support for lahaina
  ARM: dts: msm: Add jtagmm device node for lahaina
  ARM: dts: msm: Add initial device tree for Lahaina QRD Module
  ARM: dts: msm: update port number to hex format
  ARM: dts: msm: Add qseecom node for Lahaina
  ARM: dts: msm: Enable s1 in fastmap for QUPv3 drivers on lahaina
  ARM: dts: msm: Add 2-wire UART node for lahaina
  ARM: dts: msm: Add cpufreq-hw node for Lahaina
  dt-bindings: ufs: Add compitable string for V4 UFS PHY on Lahaina
  ARM: dts: msm: add reset support for UFS on Lahaina
  ARM: dts: msm: Add pshold to Lahaina
  dt-bindings: qti-tri-led: Update reg definition
  dt-bindings: pwm-qti-lpg: Update reg definition
  ARM: dts: qcom: add dt entry needed for avb
  dt-bindings: android: add entries for android
  ARM: dts: msm: Enable QRNG driver for lahaina
  dt-bindings: cpufreq: Add msm-cpufreq bindings snapshot
  dt-bindings: Add USB audio QMI driver bindings
  ARM: dts: msm: Add SPS driver node for Lahaina
  ARM: dts: msm: Add etm save/restore for Lahaina
  dt-bindings: rng: Add DT binding entry for msm-rng
  ARM: dts: msm: Disable usb1 on Lahaina RUMI
  ARM: dts: msm: Add EUD node for Lahaina
  ARM: dts: msm: Add device tree overlay support for Lahaina
  ARM: dts: msm: add documentation tx-napi
  dt-bindings: slim-msm-ngd: Add dt bindings for slimbus driver
  dt-bindings: nfc: Add Documentation for I3C NFC devicetree node
  ARM: dts: msm: Add coresight device tree for Lahaina
  dt-bindings: devfreq: add support for L3 voting in devfreq_icc
  dt-bindings: devfreq: add support for shared core-dev tables
  dt-bindings: iio: adc: Add PMIC7 VADC bindings
  ARM: dts: msm: add volume up gpio-keys device for Lahaina boards
  ARM: dts: msm: add PMK8350 PON_PBS and PON_HLOS devices
  dt-bindings: input: add qpnp-power-on bindings
  ARM: dts: msm: add SPMI debug bus for Lahaina boards
  ARM: dts: msm: add PMIC devices for Lahaina
  ARM: dts: msm: Specify clock-output-names for sleep_clk on Lahaina
  ARM: dts: qcom: Add QUP ICC Core2x path IDs for QUPv3 node
  ARM: dts: msm: add initial PCIe nodes for lahaina
  dt-bindings: arm: msm: remove msm-bus and add ICC for PCIe
  dt-bindings: arm: msm: add initial devicetree documenation for MSI
  dt-bindings: arm: msm: add initial devicetree documentation for PCIe
  dt-bindings: clocks: Add debugcc clock bindings for Lahaina
  dt-bindings: pinctrl: qcom-pmic-gpio: add PMR735A and PMR735B bindings
  dt-bindings: rtc: rtc-pm8xxx: Add binding documentation for pmk8350 rtc
  ARM: dts: msm: add SPMI PMIC arbiter device for Lahaina
  ARM: dts: msm: Add L3 devfreq devices for Lahaina
  ARM: dts: msm: Update SIDs for test devices
  dt-bindings: cpufreq: Add cpufreq firmware bindings
  ARM: dts: msm: add spss_utils to lahaina
  ARM: dts: msm: enable ipa smp2p
  ARM: dts: msm: Update the smem size for Lahaina
  ARM: dts: msm: Add limit rate on G4 for Lahaina rumi
  ARM: dts: msm: Add ufs bus voting details for Lahaina
  ARM: dts: qcom: Add spcom to support SPU on lahaina
  ARM: dts: msm: Add ion heap for Secure Processor on lahaina
  ARM: dts: msm: Add interconnect l3 epss devices for Lahaina
  ARM: dts: msm: Configure SMMU in bypass mode for Lahaina RUMI
  ARM: dts: msm: Add LLCC and DDR devfreq devices for Lahaina
  dt-bindings: interconnect: add EPSS L3 bindings
  ARM: dts: msm: Add QUPv3 SE and GPI DT node for lahaina
  dt-bindings: Add dt bindings for jtagv8 driver
  dt-bindings: qti-tri-led: Add bindings
  dt-bindings: pwm-qti-lpg: Add bindings
  dt-bindings: Add snapshot of thermal devicetree bindings
  ARM: dts: msm: enable rmtfs for Lahaina
  dt-bindings: Add device-tree bindings for EUD driver
  ARM: dts: msm: Update Lahaina's memory map to V3
  dt-bindings: devfreq: add support for memory latency QoS voting
  dt-bindings: devfreq: add support for new memlat design
  dt-bindings: devfreq: add support for different ddr types
  dt-bindings: kgsl: Add device tree bindings for the KGSL GPU driver
  dt-bindings: perf: Add DT bindings for LLCC_PMU_VER2 driver
  dt-bindings: perf: Add DT bindings for QCOM LLCC PMU driver
  dt-bindings: devfreq: Add DT bindings to support OPP BW values
  dt-bindings: Add DT bindings to support compute bound logic
  ARM: dts: msm: Add vdd_cx-supply node to gcc on Lahaina
  dt-bindings: clocks: Update gcc clock bindings for Lahaina
  ARM: dts: msm: Add vdd_mx-supply node to gpu cc on Lahaina
  dt-bindings: clocks: Update gpucc clock bindings for Lahaina
  bindings: Add device-tree bindings for qseecom driver
  ARM: dts: msm: Add tz_log node for Lahaina
  bindings: Add device-tree bindings for tz_log driver
  dt-bindings: devfreq: Add DT bindings to add a stall cycle count event
  dt-bindings: Add DT bindings for specifying the count factor
  dt-bindings: devfreq: Make the freq-table property optional
  dt-bindings: devfreq: Add DT bindings to configure byte MID match
  ARM: dts: msm: Add smcinvoke node for Lahaina
  bindings: Add device-tree bindings for smcinvoke driver
  ARM: dts: msm: add lan-rx-napi property
  ARM: dts: msm: add PIL spss node to lahaina
  dt-bindings: Add camera devicetree bindings for lahaina
  ARM: dts: msm: remove SPI config property
  ARM: dts: msm: Update USB interrupt trigger types on Lahaina
  ARM: dts: msm: Enable dcc on lahaina
  ARM: dts: msm: update clock_rpmh device node for Lahaina
  dt-bindings: clock: Add rpmh clock bindings for Lahaina
  dt-bindings: add devicetree binding for fsa4480
  ARM: dts: msm: Add USB PHY devices and related resources on Lahaina
  bindings: add support for qcom,ucsi-glink
  dt-bindings: devfreq: Add dt-bindings for BWMON HW version 5
  dt-bindings: devfreq: Add DT bindings for ARM memlat driver
  dt-bindings: devfreq: Add support for BWMON HW version 4
  dt-bindings: devfreq: Add dt-bindings for BWMON HW version 3
  dt-bindings: devfreq: Add the dt bindings for clock prepare
  dt-bindings: devfreq: Add DT bindings for devfreq_simple device
  dt-bindings: devfreq: Add dt-bindings for BWMON HW version 2
  dt-bindings: devfreq: Add DT bindings for bimc bwmon driver
  dt-bindings: devfreq: Add DT bindings for devfreq_icc device
  ARM: dts: msm: IPA msm bus dtsi update for Lahaina
  dt-bindings: i3c-master-qcom-geni: Add DT bindings for I3C GENI driver
  ARM: dts: msm: Update and enable clk-aop clks on Lahaina
  ARM: dts: qcom: add virt_clk interconnect provider
  dt-bindings: interconnect: Add clk_virt documentation on Lahaina
  ARM: dts: msm: Add USB BAM device node on Lahaina
  ARM: dts: msm: Add support for modem PIL
  ARM: dts: msm: Add SCM node
  dt-bindings: regulator: add proxy consumer bindings
  dt-bindings: pmic-glink: add qcom,pmic-glink-channel property
  ARM: dts: msm: Add GDSC regulator references for Lahaina's SMMUs
  bindings: add support for qcom,pmic-glink
  ARM: dts: msm: Add SSC based sensors with SLPI PIL on Lahaina
  ARM: dts: msm: Add modem smp2p for Lahaina
  ARM: dts: msm: Document kona device binding
  ARM: dts: msm: Add ARM PMU node for Lahaina
  dt-bindings: spi-msm-geni: Add DT bindings for SPI GENI driver
  ARM: dts: msm: Add CVP device tree for Lahaina
  ARM: dts: msm: add reset control support for UFS PHY on Lahaina
  ARM: dts: msm: Add embedded UFS device reset GPIO on Lahaina
  dt-bindings: nvmem: add bindings for QTI SDAM devices
  dt-bindings: soc: qcom: add bindings for QTI PBS devices
  dt-bindings: platform: msm: add bindings for qpnp-revid devices
  dt-bindings: spmi: spmi-pmic-arb-debug: add clock management support
  dt-bindings: spmi: add SPMI PMIC arbiter debug bus bindings
  dt-bindings: mfd: add qcom-i2c-pmic bindings
  ARM: dts: msm: Add Lahaina video configuration
  dt-bindings: pinctrl: qcom-pmic-gpio: add PM*8350* bindings
  dt-bindings: mfd: qcom,spmi-pmic: add documentation for qcom,can-sleep
  dt-bindings: gpi: Add DT bindings for GPI dmaengine driver
  ARM: dts: msm: Update and enable graphics clock controller on Lahaina
  dt-bindings: clocks: Add gpu cc clock controller bindings for Lahaina
  ARM: dts: msm: Add IPA dtsi entry for Lahaina
  dt-bindings: i2c-msm-geni: Add DT bindings for I2C GENI driver
  ARM: dts: msm: Add QUPV3 SE dt node for uart on Lahaina
  dt-bindings: Add device-tree bindings for slimbus slave driver
  dt-bindings: usb: Document USB qcom,usb-charger property
  ARM: dts: msm: add dt nodes for adsp & cdsp PIL for Lahaina
  ARM: dts: msm: change lan_rx_napi to lan-rx-napi
  bindings: usb_bam: Add USB BAM driver related documentation
  ARM: dts: msm: Update bus entries in pil-video node
  dt-bindings: media: Add video driver bindings for Lahaina
  ARM: dts: msm: Update USB device nodes on Lahaina
  dt-bindings: usb: Add bindings for MSM SSUSB
  dt-bindings: usb: Document dwc3 xhci-imod-value property
  ARM: dts: msm: add dt node for video
  ARM: dts: msm: Add camera pinctrl info for Lahaina
  bindings: Add USB PHY drivers related documentation
  ARM: dts: msm: Add glink entries for Lahaina
  ARM: dts: msm: Update and enable the cam cc  node on Lahaina
  dt-bindings: clocks: Add cam cc clock controller bindings for Lahaina
  dt-bindings: Add snapshot for 5.4-rc2
  ARM: dts: msm: add documentation lan_rx_napi
  ARM: dts: msm: Enable the secure carveout heap on Lahaina
  ARM: dts: msm: Unstub the DISP_CC node for Lahaina
  dt-bindings: clk: Add DISP_CC clock driver bindings for Lahaina
  ARM: dts: msm: Unstub the VIDEO_CC node for Lahaina
  dt-bindings: clk: Add VIDEO_CC clock driver bindings for Lahaina
  ARM: dts: msm: add initial device tree for Lahaina low power modes
  ARM: dts: msm: Add glink entry for spss on Lahaina
  ARM: dts: msm: Add shmbridge node for Lahaina
  bindings: Add device-tree bindings for qtee_shmbridge driver
  dt-bindings: Add spcom documentation
  dt-bindings: Add spss_utils documentation
  ARM: dts: msm: add wakeup parent for Lahaina
  dt-bindings: arm: snapshot of psci bindings
  dt-bindings: Introduce soc sleep stats bindings for QTI SoCs
  dt-bindings: add device bindings for DDR stats node
  dt-bindings: msm: add PM drivers device bindings
  ARM: dts: qcom: add USB GDSC supplies for Lahaina
  ARM: dts: qcom: switch PM8350 LDO 7 to RPMh control for Lahaina
  ARM: dts: qcom: add GDSC devices for Lahaina
  ARM: dts: qcom: add refgen regulator device for Lahaina
  dt-bindings: regulator: add refgen regulator bindings
  ARM: dts: qcom: switch to RPMh controlled PMIC regulators for Lahaina
  ARM: dts: qcom: add PMIC PMR735A regulator devices for Lahaina
  ARM: dts: msm: Add bcm voter devices for lahaina
  dt-bindings: interconnect: Update QTI SDM845 DT bindings
  dt-bindings: regulator: add rpmh-regulator bindings
  ARM: dts: qcom: update PMIC regulator voltage limits for Lahaina
  dt-bindings: of: irq: document properties for wakeup interrupt parent
  dt-bindings: pdc: Add SPI config register
  ARM: dts: msm: add capacity and DPC properties for Lahaina
  ARM: dts: msm: Add WDT node for Lahaina
  ARM: dts: msm: Update and enable the clock_gcc node on Lahaina
  dt-bindings: clocks: add gcc clock controller bindings for Lahaina
  dt-bindings: dma: sps: Add dt binding for SPS driver
  dt-bindings: regulator: add PMIC PM8008 regulator bindings
  ARM: dts: msm: remove uncessary node from IPA nodes for Lahaina SoC
  ARM: dts: msm: Correct the UFS PHY address space for Lahaina
  ARM: dts: msm: Use dt-bindings header for ION on Lahaina
  ARM: dts: msm: Add smp2p sleepstate node for Lahaina
  ARM: dts: msm: Add AOP QMP nodes for Lahaina
  ARM: dts: msm: Update the timer clock frequence as per RUMI E3.0
  dt-bindings: arm: Add CSR/TPDM/TPDA/TGU/Remote ETM support
  ARM: dts: msm: add fastrpc and cdsp device nodes for lahaina
  dt-bindings: Add device-tree bindings for Watchdog driver
  ARM: dts: msm: add RSC device bindings for lahaina
  ARM: dts: msm: add PDC device bindings for Lahaina
  dt-bindings: Add documentation for the mem-offline driver
  ARM: dts: msm: Add core hang detection to dt
  bindings: Add qcom,msm-hang-detect schema
  dt-bindings: arm: coresight: add trace unit power property
  dt-bindings: Add dt bindings for memory dump
  dt-bindings: Add dt bindings for dcc
  dt-bindings: Add device-tree bindings for BT power driver
  dt-bindings: regulator: gdsc-regulator: add property for register retention
  dt-bindings: clk: gdsc-regulator: add parent supply property
  dt-bindings: regulator: add gdsc-regulator bindings
  dt-bindings: clock: add rpmh clock bindings for Kona
  dt-bindings: clk: add AOP clock controller bindings
  dt-bindings: qdsp: device-tree documentation for fastrpc and CDSP loader
  dt-bindings: Add device-tree bindings for rtc6226 driver
  ARM: dts: msm: Add IPA node for Lahaina SoC
  bindings: serial: Binding for serial UART driver
  bindings: qcom-geni-se: Common GENI driver
  dt-bindings: Add snapshot for 5.3-rc4
  dt-bindings: qdsp: Device tree documentation for sensors ssc
  ARM: dts: msm: Add initial ION heaps for Lahaina
  ARM: dts: msm: Make the CDSP secure carveout mappable on Lahaina
  ARM: dts: msm: add msm_rtb tracing
  bindings: Add qcom,msm-rtb schema
  ARM: dts: msm: Add USB device nodes for Lahaina
  ARM: dts: msm: Add HWSPINLOCK, SMEM and SMP2P for Lahaina
  ARM: dts: msm: Disable the coherent KGSL IOMMU test device
  ARM: dts: msm: Fix major and minor versions for Lahaina boards
  dt-bindings: net: qrtr: Add FIFO transport bindings
  dt-bindings: arm: msm: Add sleepstate-smp2p bindings
  dt-bindings: arm: msm: Introduce qsee_ipc_irq_bridge bindings
  dt-bindings: arm: msm: Introduce qcom,qsee_irq bindings
  dt-bindings: soc: qcom: Introduce Glink Pkt bindings
  dt-bindings: soc: qcom: Introduce Glink Probe bindings
  ARM: dts: msm: Add device-tree entry for IMEM
  ARM: dts: msm: Add support for SCM PAS
  dt-bindings: Add device-tree bindings for IMEM
  bindings: Add device-tree bindings for secure PIL driver
  dt-bindings: Introduce QMP debugfs client bindings
  dt-bindings: mailbox: Introduce MSM_QMP bindings
  dt-bindings: kryo-edac: add kryo edac bindings
  ARM: dts: msm: Add edac node for Lahaina SoC
  ARM: dts: msm: Enable the graphics SMMU on Lahaina
  dt-bindings: Add device-tree bindings for CNSS2 driver
  ARM: dts: msm: Add IPCC test nodes for end to end verification
  ARM: dts: msm: Add IPCC node for Lahaina
  dt-bindings: Add device-tree bindings for IPCC driver
  ARM: dts: msm: Make LLCC node compatible with "qcom,lahaina-llcc"
  dt-bindings: LLCC: Add "qcom,lahaina-llcc" compatible property
  dt-bindings: Add device-tree bindings for the ION memory manager
  ARM: dts: msm: Add the SMMU devices for Lahaina
  ARM: dts: msm: Add the secure buffer device for Lahaina
  dt-bindings: Merge all IOMMU documentation from msm-4.19 to msm-lahaina
  ARM: dts: msm: Add device-tree node for LLCC driver
  dt-bindings: LLCC: Add "qcom,llcc-v2" compatible property
  ARM: dts: msm: add ufs device support for Lahaina
  ARM: dts: msm: add stub interconnect devices for Lahaina
  bindings: usb: Add bindings for USB PHY on QTI emulation platform
  ARM: dts: msm: Add SCM node for Lahaina SoC
  bindings: Add device-tree bindings for SCM driver
  ARM: dts: msm: Add memory carveouts as per Lahaina v2 memory map
  dt-bindings: interconnect: add interconnect bindings
  dt-bindings: Add snapshot from tmp-f686d9f
  ARM: dts: msm: Add pinctrl node for TLMM on Lahaina SoC
  bindings: pinctrl: Add device-tree bindings for Lahaina pinctrl driver
  ARM: dts: msm: add stub clock devices for Lahaina
  dt-bindings: clocks: add dummycc bindings
  bindings: Add snapshot of bindings with GPL-2.0 or BSD-2-Clause license
  ARM: dts: msm: add stub regulator devices for Lahaina
  dt-bindings: regulator: add stub regulator bindings
  ARM: dts: msm: Add initial device tree for Lahaina
  dt-bindings: msm: Add compatible strings for Lahaina
  dt-bindings: Snapshot of msm device tree binding document
  ARM: dts: vendor: Add an initial Makefile to the vendor
  dt-bindings: Add devicetree bindings to devicetree project
  Initial empty repository

Change-Id: Icb722bcaa651702f1843582ae7f1bd9807681018
This commit is contained in:
Venkata Narendra Kumar Gutta
2020-05-08 12:55:29 -07:00
390 changed files with 47332 additions and 14 deletions

8
bindings/input/keys.txt Normal file
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General Keys Properties:
Optional properties for Keys:
- power-off-time-sec: Duration in seconds which the key should be kept
pressed for device to power off automatically. Device with key pressed
shutdown feature can specify this property.
- linux,keycodes: Specifies the numeric keycode values to be used for
reporting key presses.

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Onkey driver for MAX77650 PMIC from Maxim Integrated.
This module is part of the MAX77650 MFD device. For more details
see Documentation/devicetree/bindings/mfd/max77650.txt.
The onkey controller is represented as a sub-node of the PMIC node on
the device tree.
Required properties:
--------------------
- compatible: Must be "maxim,max77650-onkey".
Optional properties:
- linux,code: The key-code to be reported when the key is pressed.
Defaults to KEY_POWER.
- maxim,onkey-slide: The system's button is a slide switch, not the default
push button.
Example:
--------
onkey {
compatible = "maxim,max77650-onkey";
linux,code = <KEY_END>;
maxim,onkey-slide;
};

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* Freescale MPR121 Controllor
Required Properties:
- compatible: Should be "fsl,mpr121-touchkey"
- reg: The I2C slave address of the device.
- interrupts: The interrupt number to the cpu.
- vdd-supply: Phandle to the Vdd power supply.
- linux,keycodes: Specifies an array of numeric keycode values to
be used for reporting button presses. The array can
contain up to 12 entries.
Optional Properties:
- wakeup-source: Use any event on keypad as wakeup event.
- autorepeat: Enable autorepeat feature.
Example:
#include "dt-bindings/input/input.h"
touchkey: mpr121@5a {
compatible = "fsl,mpr121-touchkey";
reg = <0x5a>;
interrupt-parent = <&gpio1>;
interrupts = <28 2>;
autorepeat;
vdd-supply = <&ldo4_reg>;
linux,keycodes = <KEY_0>, <KEY_1>, <KEY_2>, <KEY_3>,
<KEY_4> <KEY_5>, <KEY_6>, <KEY_7>,
<KEY_8>, <KEY_9>, <KEY_A>, <KEY_B>;
};

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Qualcomm Technologies, Inc. High-Voltage Haptics
The High-Voltage Haptics module in QTI PMICs can support either ERM or
LRA actuators with drive voltage up to 10 V. It also has five different
pattern sources (DIRECT_PLAY, PATTERN1, PATTERN2, FIFO, SWR) which can
be used for playing different vibration effects. This binding document
describes the properties for this PMIC module.
This haptics device supports 2 levels of nodes. The main node defines
the hardware configuration based on the actuator used in the platform.
Child nodes define the configurations for different haptics effects
that can be supported.
Properties:
- compatible:
Usage: required
Value type: <string>
Definition: It can be one of following:
"qcom,hv-haptics",
"qcom,pm8350b-haptics".
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: Register base for HAPTICS_CFG and HAPTICS_PATTERN modules.
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: Peripheral interrupt specifier.
- interrupt-names:
Usage: required
Value type: <string>
Definition: Interrupt names. This string list must match up 1-to-1 with
the interrupts specified in the 'interrupts' property.
The following interrupt is required: "fifo-empty".
- qcom,vmax-mv:
Usage: optional
Value type: <u32>
Definition: Specifies the maximum allowed output voltage in millivolts
for the actuator. The value specified here will be rounded
off to the closest multiple of 50 mV. Allowed values: 0 to
11000. If this is not specified, 5000 mV will be used by
default.
- qcom,brake-mode:
Usage: optional
Value type: <u32>
Definition: Specifies vibration brake mode. Please refer to:
include/dt-bindings/input/qcom,hv-haptics.h.
If this is not defined, "auto" brake mode will be used
by default.
- qcom,brake-disable:
Usage: optional
Value type: <bool>
Definition: Specifies if vibation brake is disabled.
- qcom,brake-pattern:
Usage: optional
Value type: <prop-encoded-array>
Definition: Specifies the brake pattern in a byte array which is less
than 8 elements. The array needs to be specified as 8-bit
using '/bits/ 8' parameter. The pattern will be played at the
end of the playing waveform if manual brake mode (either
open-loop or close-loop) is selected. If this is not defined,
or if it's defined as an array with all zeros, then manual
brake is disabled.
- qcom,use-erm:
Usage: optional
Value type: <bool>
Definition: Specifies if the hardware is driving an ERM actuator. If it's
not defined, then LRA actuator is used.
The following properties are only required when LRA actuator is used:
- qcom,lra-period-us:
Usage: required
Value type: <u32>
Definition: Specifies the initial resonance period in microseconds for
LRA actuator. It has to be specified if an LRA actuator is
used. Allowed values: 5 to 20475.
- qcom,drv-sig-shape:
Usage: optional
Value type: <u32>
Definition: Specifies the drive signal shape for LRA. Please refer to:
include/dt-bindings/input/qcom,hv-haptics.h.
The "sine" drive signal is used by default if this property
is not defined.
- qcom,brake-sig-shape:
Usage: optional
Value type: <u32>
Definition: Specifies the reverse brake signal shape. Please refer to:
include/dt-bindings/input/qcom,hv-haptics.h.
The "sine" brake signal is used by default if this property
is not defined.
- qcom,brake-sine-gain:
Usage: optional
Value type: <u32>
Definition: Specifies the brake signal gain when sine brake signal shape
is selected. Please refer to:
include/dt-bindings/input/qcom,hv-haptics.h.
The following properties should be specified in child nodes for defining
different vibration effects:
- qcom,effect-id:
Usage: required
Value type: <u32>
Definition: Specifies the effect ID that a client can request to play
the corresponding effect definition in this child node. The ID
is normaly defined and sent from userspace for certain user
notification event.
- qcom,wf-vmax-mv:
Usage: optional
Value type: <u32>
Definition: Specifies maximum allowed output voltage in millivolts for
this effect. Value specified here will be rounded off to
the closest multiple of 50 mV. Allowed values: 0 to 11000. If
this is not specified, the value of "qcom,vmax-mv" which is
defined in the parent node will be used.
- qcom,wf-pattern-data:
Usage: required
Value type: <prop-encoded-array>
Definition: Defines an array of 8 3-tuples in which each tuple specifies
the 3-element pattern data that will be played in PATTERN1
source mode by default. The 3 elements of each tuple are:
[0] => 9-bit pattern amplitude.
[1] => play period for this pattern amplitude. See
include/dt-bindings/input/qcom,hv-haptics.h
[2] => a 0/1 flag to indicate if the frequency of the LRA
drive signal will be doubled when playing this pattern.
- qcom,wf-pattern-preload:
Usage: optional
Value type: <bool>
Definition: Specifies if the effect pattern should be preloaded into
PATTERN2 source during boot up and it won't be changed when
device is alive. For the effect that has this property
specified, register configurations are done already for
achieving low latency response. This can be specified only for
one effect.
- qcom,wf-pattern-period-us:
Usage: optional
Value type: <u32>
Definition: Specifies the play period in microseconds for each pattern
entry defined in "qcom,wf-pattern-data". Allowed values:
5 to 20475.
- qcom,wf-fifo-data:
Usage: optional
Value type: <prop-encoded-array>
Definition: Defines a 9-bit data array of patterns which will be filled
into the FIFO memory and played when FIFO mode is selected.
The array needs to be specified as 16-bit using '/bits/ 16'
parameter. Either "qcom,wf-pattern-data" or "qcom,wf-fifo-data"
need to be defined in one effect child node. If both are
defined, then the FIFO data defined in this property will be
ignored.
- qcom,wf-fifo-period:
Usage: optional
Value type: <u32>
Definition: Specifies the play period definition for the FIFO data defined
in "qcom,wf-fifo-data".
See definition at: include/dt-bindings/input/qcom,hv-haptics.h
- qcom,wf-brake-mode:
Usage: optional
Value type: <u32>
Definition: Specifies the brake mode for this effect. Please refer to:
include/dt-bindings/input/qcom,hv-haptics.h.
If this is not defined, the brake mode defined in
"qcom,brake-mode" will be used for this effect.
- qcom,wf-brake-pattern:
Usage: optional
Value type: <prop-encoded-array>
Definition: Specifies manual brake pattern for this effect. The array needs
to be specified as 8-bit using '/bits/ 8' parameter.
If it's not defined, the brake pattern defined in
"qcom,brake-pattern" will be used for this effect.
- qcom,wf-brake-disable:
Usage: optional
Value type: <bool>
Definition: Specifies if the vibration brake is disabled for this effect.
- qcom,wf-brake-sine-gain:
Usage: optional
Value type: <u32>
Definition: Specifies the brake sine signal gain for this effect when sine
brake signal shape is selected. Please refer to:
include/dt-bindings/input/qcom,hv-haptics.h.
- qcom,wf-auto-res-disable:
Usage: optional
value type: <bool>
Definition: Specifies if the effect will be played with LRA auto resonance
feature disabled.
Example:
qcom,hv-haptics@f000 {
compatible = "qcom,hv-haptics";
reg = <0xf000>, <0xf100>;
interrupts = <0x3 0xf0 0x1 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "fifo-empty";
qcom,vmax-mv = <900>;
qcom,brake-mode = <BRAKE_CLOSE_LOOP>;
qcom,brake-pattern = /bits/ 8 <0xff 0x3f 0x1f>;
qcom,lra-period-us = <5880>;
qcom,drv-sig-shape = <WF_SINE>;
qcom,brake-sig-shape = <WF_SINE>;
effect_0 {
/* CLICK effect */
qcom,effect-id = <0>;
qcom,wf-vmax-mv = <8000>;
qcom,wf-pattern-data = <0x01f S_PERIOD_T_LRA 0>,
<0x03f S_PERIOD_T_LRA 0>,
<0x05f S_PERIOD_T_LRA 0>,
<0x07f S_PERIOD_T_LRA 0>,
<0x17f S_PERIOD_T_LRA 0>,
<0x15f S_PERIOD_T_LRA 0>,
<0x13f S_PERIOD_T_LRA 0>,
<0x11f S_PERIOD_T_LRA 0>;
qcom,wf-pattern-period-us = <5000>;
qcom,wf-brake-pattern = /bits/ 8 <0xff 0x7f 0x3f>;
qcom,wf-pattern-preload;
qcom,wf-auto-res-disable;
};
effect_1 {
/* DOUBLE_CLICK effect */
qcom,effect-id = <1>;
qcom,wf-vmax-mv = <5000>;
qcom,wf-fifo-data = /bits/ 16 <0x1ff 0x1ff 0x1ff 0x1ff 0x1ff
0x1ff 0x1ff 0x1ff 0x1ff 0x1ff
0x1ff 0x1ff 0x1ff 0x1ff 0x1ff>;
qcom,wf-fifo-period = <S_PERIOD_F_8KHZ>;
qcom,wf-brake-pattern = /bits/ 8 <0x7f 0x5f 0x3f>;
qcom,wf-auto-res-disable;
};
};

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Qualcomm Technologies, Inc. QPNP Power-on PMIC Peripheral Device Tree Bindings
qpnp-power-on devices support the power-on (PON) peripheral found on
Qualcomm Technologies, Inc. PMICs. The supported functionality includes power
on/off reason, key press/release detection, PMIC reset configurations and other
PON specific features. The PON module supports multiple physical power-on
(KPDPWR_N, CBLPWR) and reset (KPDPWR_N, RESIN, KPDPWR+RESIN) sources. This
peripheral is connected to the host processor via the SPMI interface.
Required properties:
- compatible: Must be "qcom,qpnp-power-on"
- reg: Specifies the SPMI base address for this PON
(power-on) peripheral.
Optional properties:
- interrupts: Specifies the interrupts associated with PON.
- interrupt-names: Specifies the interrupt names associated with
the interrupts property. Must be a subset of
"kpdpwr", "kpdpwr-bark", "resin", "resin-bark",
"cblpwr", "kpdpwr-resin-bark", and
"pmic-wd-bark". Bark interrupts are associated
with system reset configuration to allow default
reset configuration to be activated. If system
reset configuration is not supported then bark
interrupts are nops. Additionally, the
"pmic-wd-bark" interrupt can be added if the
system needs to handle PMIC watchdog barks.
- qcom,pon-dbc-delay: The debounce delay for the power-key interrupt
specified in us.
Possible values for GEN1 PON are:
15625, 31250, 62500, 125000, 250000, 500000,
1000000 and 2000000.
Possible values for GEN2 PON are:
62, 123, 245, 489, 977, 1954, 3907, 7813,
15625, 31250, 62500, 125000 and 250000.
Intermediate value is rounded down to the
nearest valid value.
- qcom,system-reset: Boolean which specifies that this PON peripheral
can be used to reset the system. This property
can only be used by one device on the system. It
is an error to include it more than once.
- qcom,modem-reset: Boolean which specifies that this PON peripheral
can be used to reset the attached modem chip.
This property can only be used by one PON device
on the system. qcom,modem-reset and
qcom,system-reset cannot be specified for the
same PON device.
- qcom,s3-debounce: The debounce delay for stage 3 reset trigger in
secs. The values range from 0 to 128.
- qcom,s3-src: The source for stage 3 reset. It can be one of
"kpdpwr", "resin", "kpdpwr-or-resin" or
"kpdpwr-and-resin".
- qcom,uvlo-panic: Boolean indicating that the device should
trigger a controlled panic shutdown if a restart
was caused by under voltage lock-out (UVLO).
- qcom,clear-warm-reset: Boolean which specifies that the WARM_RESET
reason registers need to be cleared for this
target. The property is used for the targets
which have a hardware feature to catch resets
which aren't triggered by the application
processor. In such cases clearing WARM_REASON
registers across processor resets keeps the
registers in a useful state.
- qcom,secondary-pon-reset: Boolean property which indicates that the PON
peripheral is a secondary PON device which
needs to be configured during reset in addition
to the primary PON device that is configured
for system reset through qcom,system-reset
property.
This should not be defined along with the
qcom,system-reset or qcom,modem-reset property.
- qcom,store-hard-reset-reason: Boolean property which if set will store the
hardware reset reason to SOFT_RB_SPARE register
of the core PMIC PON peripheral.
- qcom,warm-reset-poweroff-type: Poweroff type required to be configured
on PS_HOLD reset control register when the
system goes for warm reset. If this property is
not specified, then the default type, warm reset
will be configured to PS_HOLD reset control
register.
Supported values: PON_POWER_OFF_TYPE_* found in
include/dt-bindings/input/qcom,qpnp-power-on.h
- qcom,hard-reset-poweroff-type: Same description as
qcom,warm-reset-poweroff-type but this applies
for the system hard reset case.
- qcom,shutdown-poweroff-type: Same description as qcom,warm-reset-poweroff-
type but this applies for the system shutdown
case.
- qcom,kpdpwr-sw-debounce: Boolean property to enable the debounce logic
on the KPDPWR_N rising edge.
- qcom,resin-pon-reset: Boolean property which indicates that resin
needs to be configured during reset in addition
to the primary PON device that is configured
for system reset through qcom,system-reset
property.
- qcom,resin-warm-reset-type: Poweroff type required to be configured on
RESIN reset control register when the system
initiates warm reset. If this property is not
specified, then the default type, warm reset
will be configured to RESIN reset control
register. This property is effective only if
qcom,resin-pon-reset is defined.
Supported values: PON_POWER_OFF_TYPE_* found in
include/dt-bindings/input/qcom,qpnp-power-on.h
- qcom,resin-hard-reset-type: Same description as qcom,resin-warm-reset-type
but this applies for the system hard reset case.
- qcom,resin-shutdown-type: Same description as qcom,resin-warm-reset-type
but this applies for the system shutdown case.
- qcom,resin-shutdown-disable: Boolean property to disable RESIN power off
trigger during system shutdown case.
This property is effective only if
qcom,resin-pon-reset is defined.
- qcom,resin-hard-reset-disable: Boolean property to disable RESIN power
off trigger during system hard reset case.
This property is effective only if
qcom,resin-pon-reset is defined.
- qcom,ps-hold-shutdown-disable: Boolean property to disable PS_HOLD
power off trigger during system shutdown case.
- qcom,ps-hold-hard-reset-disable: Boolean property to disable PS_HOLD
power off trigger during system hard reset case.
Optional Sub-nodes:
- qcom,pon_1 ... qcom,pon_n: These PON child nodes correspond to features
supported by the PON peripheral including reset
configurations, pushbutton keys, and regulators.
Sub-node properties:
Sub-nodes (if defined) should belong to either a PON configuration or a
regulator configuration.
Regulator sub-node required properties:
- regulator-name: Regulator name for the PON regulator that is
being configured.
- qcom,pon-spare-reg-addr: Register offset from the base address of the
PON peripheral that needs to be configured for
the regulator being controlled.
- qcom,pon-spare-reg-bit: Bit position in the specified register that
needs to be configured for the regulator being
controlled.
PON sub-node required properties:
- qcom,pon-type: The type of PON/RESET source. Supported values:
0 = KPDPWR
1 = RESIN
2 = CBLPWR
3 = KPDPWR_RESIN
These values are PON_POWER_ON_TYPE_* found in
include/dt-bindings/input/qcom,qpnp-power-on.h
PON sub-node optional properties:
- qcom,pull-up: Boolean flag indicating if a pull-up resistor
should be enabled for the input.
- qcom,support-reset: Indicates if this PON source supports
reset functionality.
0 = Not supported
1 = Supported
If this property is not defined, then default S2
reset configurations should not be modified.
- qcom,use-bark: Specify if this PON type needs to handle a bark
interrupt.
- linux,code: The input key-code associated with the reset
source. The reset source in its default
configuration can be used to support standard
keys.
The below mentioned properties are required only when qcom,support-reset DT
property is defined and is set to 1.
- qcom,s1-timer: The debounce timer for the BARK interrupt for
the reset source. Value is specified in ms.
Supported values are:
0, 32, 56, 80, 128, 184, 272, 408, 608, 904,
1352, 2048, 3072, 4480, 6720, 10256
- qcom,s2-timer: The debounce timer for the S2 reset specified
in ms. On the expiry of this timer, the PMIC
executes the reset sequence.
Supported values are:
0, 10, 50, 100, 250, 500, 1000, 2000
- qcom,s2-type: The type of reset associated with this source.
Supported values:
0 = SOFT_RESET (legacy)
1 = WARM_RESET
4 = SHUTDOWN
5 = DVDD_SHUTDOWN
7 = HARD_RESET
8 = DVDD_HARD_RESET
These values are PON_POWER_OFF_TYPE_* found in
include/dt-bindings/input/qcom,qpnp-power-on.h
Examples:
qcom,power-on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800>;
interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x8 0x4 IRQ_TYPE_EDGE_RISING>,
<0x0 0x8 0x5 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "kpdpwr", "resin", "resin-bark",
"kpdpwr-resin-bark";
qcom,pon-dbc-delay = <15625>;
qcom,system-reset;
qcom,s3-debounce = <32>;
qcom,s3-src = "resin";
qcom,clear-warm-reset;
qcom,store-hard-reset-reason;
qcom,pon_1 {
qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>;
qcom,pull-up;
linux,code = <KEY_POWER>;
};
qcom,pon_2 {
qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>;
qcom,support-reset = <1>;
qcom,pull-up;
qcom,s1-timer = <0>;
qcom,s2-timer = <2000>;
qcom,s2-type = <PON_POWER_OFF_TYPE_WARM_RESET>;
linux,code = <KEY_VOLUMEDOWN>;
qcom,use-bark;
};
qcom,pon_3 {
qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR_RESIN>;
qcom,support-reset = <1>;
qcom,s1-timer = <6720>;
qcom,s2-timer = <2000>;
qcom,s2-type = <PON_POWER_OFF_TYPE_HARD_RESET>;
qcom,pull-up;
qcom,use-bark;
};
};
qcom,power-on@800 {
compatible = "qcom,qpnp-power-on";
reg = <0x800>;
qcom,secondary-pon-reset;
qcom,hard-reset-poweroff-type = <PON_POWER_OFF_TYPE_SHUTDOWN>;
pon_perph_reg: qcom,pon_perph_reg {
regulator-name = "pon_spare_reg";
qcom,pon-spare-reg-addr = <0x8c>;
qcom,pon-spare-reg-bit = <1>;
};
};

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STMicroelectronics touch controller
The STMicroelectronics controller is connected to host processor
via i2c. The controller generates interrupts when the
user touches the panel. The host controller is expected
to read the touch coordinates over i2c and pass the coordinates
to the rest of the system.
Required properties:
- compatible : should be "st,fts".
- reg : i2c slave address of the device.
- interrupt-parent : parent of interrupt.
- interrupts : touch sample interrupt to indicate presense or release
of fingers on the panel.
- vdd-supply : Power supply needed to power up the device.
- vcc-supply : Power source required to power up i2c bus.
- st,irq-gpio : irq gpio which is to provide interrupts to host,
same as "interrupts" node. It will also
contain active low or active high information.
- st,reset-gpio : reset gpio to control the reset of chip.
- pinctrl-names : This should be defined if a target uses pinctrl framework.
See "pinctrl" in Documentation/devicetree/bindings/pinctrl/msm-pinctrl.txt.
Specify the names of the configs that pinctrl can install in driver.
Following are the pinctrl configs that can be installed:
"pmx_ts_active" : Active configuration of pins, this should specify active
config defined in pin groups of interrupt and reset gpio.
"pmx_ts_suspend" : Disabled configuration of pins, this should specify sleep
config defined in pin groups of interrupt and reset gpio.
"pmx_ts_release" : Release configuration of pins, this should specify
release config defined in pin groups of interrupt and reset gpio.
- st,regulator_avdd : name of Power supply needed to power up the device.
- st,regulator_dvdd : name of Power source required to power up i2c bus.
Optional properties:
Example:
i2c@78b9000 { /* BLSP1 QUP5 */
st_fts@49 {
compatible = "st,fts";
reg = <0x49>;
interrupt-parent = <&msm_gpio>;
interrupts = <13 0x2008>;
vdd-supply = <&pm8916_l17>;
vcc-supply = <&pm8916_l6>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
st,irq-gpio = <&msm_gpio 13 0x00000001>;
st,reset-gpio = <&msm_gpio 12 0x0>;
st,regulator_dvdd = "vdd";
st,regulator_avdd = "avdd";
};
};

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FocalTech touch controller
The focaltech controller is connected to host processor via i2c. The controller generates interrupts when the user touches the panel. The host controller is expected to read the touch coordinates over i2c and pass the coordinates to the rest of the system.
Required properties:
- compatible : should be "focaltech,fts_ts"
- reg : i2c slave address of the device, should be <0x38>; For spi interface, means cs number, always be 0
- interrupt-parent : parent of interrupt
- interrupts : irq gpio, "0x02" stands for that the irq triggered by falling edge.
- focaltech,irq-gpio : irq gpio, same as "interrupts" node.
- focaltech,reset-gpio : reset gpio
- focaltech,num-max-touches : maximum number of touches support
- focaltech,display-coords : display resolution in pixels. A four tuple consisting of minX, minY, maxX and maxY.
Optional properties:
- focaltech,have-key : specify if virtual keys are supported
- focaltech,key-number : number of keys
- focaltech,keys : virtual key codes mapping to the coords
- focaltech,key-x-coords : constant x coordinates of keys, depends on the x resolution
- focaltech,key-y-coords : constant y coordinates of keys, depends on the y resolution
Example:
I2C Interface:
i2c@f9927000 {
focaltech@38{
compatible = "focaltech,fts_ts";
reg = <0x38>;
interrupt-parent = <&msm_gpio>;
interrupts = <13 0x02>;
focaltech,reset-gpio = <&msm_gpio 12 0x01>;
focaltech,irq-gpio = <&msm_gpio 13 0x02>;
focaltech,max-touch-number = <10>;
focaltech,display-coords = <0 0 1080 1920>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend","pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
/*
focaltech,have-key;
focaltech,key-number = <3>;
focaltech,keys = <139 102 158>;
focaltech,key-x-coords = <200 600 800>;
focaltech,key-y-coords = <2000 2000 2000>;
*/
};
};
SPI Interface:
spi@78b9000 {
focaltech@0 {
compatible = "focaltech,fts_ts";
reg = <0x0>;
spi-max-frequency = <6000000>;
interrupt-parent = <&msm_gpio>;
interrupts = <13 0x2>;
focaltech,reset-gpio = <&msm_gpio 12 0x01>;
focaltech,irq-gpio = <&msm_gpio 13 0x02>;
focaltech,max-touch-number = <10>;
focaltech,display-coords = <0 0 1080 1920>;
pinctrl-names = "pmx_ts_active","pmx_ts_suspend","pmx_ts_release";
pinctrl-0 = <&ts_int_active &ts_reset_active>;
pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
pinctrl-2 = <&ts_release>;
};
};

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Device tree bindings for Goodix GT9xx series touchscreen controller
Required properties:
- compatible : Should be "goodix,gt1151"
or "goodix,gt5663"
or "goodix,gt5688"
or "goodix,gt911"
or "goodix,gt9110"
or "goodix,gt912"
or "goodix,gt927"
or "goodix,gt9271"
or "goodix,gt928"
or "goodix,gt967"
- reg : I2C address of the chip. Should be 0x5d or 0x14
- interrupts : Interrupt to which the chip is connected
Optional properties:
- irq-gpios : GPIO pin used for IRQ. The driver uses the
interrupt gpio pin as output to reset the device.
- reset-gpios : GPIO pin used for reset
- AVDD28-supply : Analog power supply regulator on AVDD28 pin
- VDDIO-supply : GPIO power supply regulator on VDDIO pin
- touchscreen-inverted-x
- touchscreen-inverted-y
- touchscreen-size-x
- touchscreen-size-y
- touchscreen-swapped-x-y
The touchscreen-* properties are documented in touchscreen.txt in this
directory.
Example:
i2c@00000000 {
/* ... */
gt928@5d {
compatible = "goodix,gt928";
reg = <0x5d>;
interrupt-parent = <&gpio>;
interrupts = <0 0>;
irq-gpios = <&gpio1 0 0>;
reset-gpios = <&gpio1 1 0>;
};
/* ... */
};