From 02ca20b356c943816ce2447ae9b8eb5dc025c5eb Mon Sep 17 00:00:00 2001 From: Ram Prakash Gupta Date: Thu, 10 Nov 2022 18:57:46 +0530 Subject: [PATCH] ARM: dts: msm: Add platform changes for ravelin ufs Add platform specific dt changes of UFS for ravelin. Change-Id: Idc92d001ceb4e2a44e64530b9760600a16ffcd9c --- qcom/ravelin-atp.dtsi | 55 +++++++++++++++++++++++++++++++++++++++++++ qcom/ravelin-idp.dtsi | 55 +++++++++++++++++++++++++++++++++++++++++++ qcom/ravelin-qrd.dtsi | 55 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 165 insertions(+) diff --git a/qcom/ravelin-atp.dtsi b/qcom/ravelin-atp.dtsi index 2f30b91f..30f48555 100644 --- a/qcom/ravelin-atp.dtsi +++ b/qcom/ravelin-atp.dtsi @@ -88,3 +88,58 @@ pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; }; }; +&ufsphy_mem { + /* + * Here parrot phy is used for ravelin as it + * do not have its own list for module load and + * hence compatible is using parrot. + * We have plan to improve this by making phy binary + * target independent. + */ + compatible = "qcom,ufs-phy-qmp-v4-parrot"; + + vdda-phy-supply = <&L5B>; + vdda-pll-supply = <&L16B>; + vdda-phy-max-microamp = <88530>; + vdda-pll-max-microamp = <18310>; + + status = "ok"; +}; + +&ufshc_mem { + vdd-hba-supply = <&gcc_ufs_phy_gdsc>; + + vcc-supply = <&L5E>; + vcc-max-microamp = <1056000>; + + vccq-supply = <&L13B>; + vccq-max-microamp = <750000>; + + vccq2-supply = <&L19B>; + vccq2-max-microamp = <750000>; + + qcom,vddp-ref-clk-supply = <&L13B>; + qcom,vddp-ref-clk-max-microamp = <100>; + + /* + * ufs-dev-types and nvmem entries are for ufs device + * identification using nvmem interface. Use number of + * ufs devices supported for ufs-dev-types, and nvmem handle + * added by pmic for sdam register. + * + * Default value taken by driver is bit[0] = 0 for 3.x and + * bit[0] = 1 for 2.x driver code takes this as default case. + * + * But Bit value to identify ufs device is not consistent + * across the targets it could be bit[0] = 0/1 for UFS2.x/3x + * and vice versa. If the bit[0] value is not same as default + * value used in driver and if its reverted then use flag + * qcom,ufs-dev-revert to identify ufs device. + */ + ufs-dev-types = <2>; + qcom,ufs-dev-revert; + nvmem-cells = <&ufs_dev>, <&boot_config>; + nvmem-cell-names = "ufs_dev", "boot_conf"; + + status = "ok"; +}; diff --git a/qcom/ravelin-idp.dtsi b/qcom/ravelin-idp.dtsi index 28088cce..59a6c37a 100644 --- a/qcom/ravelin-idp.dtsi +++ b/qcom/ravelin-idp.dtsi @@ -131,3 +131,58 @@ pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; }; }; +&ufsphy_mem { + /* + * Here parrot phy is used for ravelin as it + * do not have its own list for module load and + * hence compatible is using parrot. + * We have plan to improve this by making phy binary + * target independent. + */ + compatible = "qcom,ufs-phy-qmp-v4-parrot"; + + vdda-phy-supply = <&L5B>; + vdda-pll-supply = <&L16B>; + vdda-phy-max-microamp = <88530>; + vdda-pll-max-microamp = <18310>; + + status = "ok"; +}; + +&ufshc_mem { + vdd-hba-supply = <&gcc_ufs_phy_gdsc>; + + vcc-supply = <&L5E>; + vcc-max-microamp = <1056000>; + + vccq-supply = <&L13B>; + vccq-max-microamp = <750000>; + + vccq2-supply = <&L19B>; + vccq2-max-microamp = <750000>; + + qcom,vddp-ref-clk-supply = <&L13B>; + qcom,vddp-ref-clk-max-microamp = <100>; + + /* + * ufs-dev-types and nvmem entries are for ufs device + * identification using nvmem interface. Use number of + * ufs devices supported for ufs-dev-types, and nvmem handle + * added by pmic for sdam register. + * + * Default value taken by driver is bit[0] = 0 for 3.x and + * bit[0] = 1 for 2.x driver code takes this as default case. + * + * But Bit value to identify ufs device is not consistent + * across the targets it could be bit[0] = 0/1 for UFS2.x/3x + * and vice versa. If the bit[0] value is not same as default + * value used in driver and if its reverted then use flag + * qcom,ufs-dev-revert to identify ufs device. + */ + ufs-dev-types = <2>; + qcom,ufs-dev-revert; + nvmem-cells = <&ufs_dev>, <&boot_config>; + nvmem-cell-names = "ufs_dev", "boot_conf"; + + status = "ok"; +}; diff --git a/qcom/ravelin-qrd.dtsi b/qcom/ravelin-qrd.dtsi index c054bbbb..f98cec4d 100644 --- a/qcom/ravelin-qrd.dtsi +++ b/qcom/ravelin-qrd.dtsi @@ -88,3 +88,58 @@ pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; }; }; +&ufsphy_mem { + /* + * Here parrot phy is used for ravelin as it + * do not have its own list for module load and + * hence compatible is using parrot. + * We have plan to improve this by making phy binary + * target independent. + */ + compatible = "qcom,ufs-phy-qmp-v4-parrot"; + + vdda-phy-supply = <&L5B>; + vdda-pll-supply = <&L16B>; + vdda-phy-max-microamp = <88530>; + vdda-pll-max-microamp = <18310>; + + status = "ok"; +}; + +&ufshc_mem { + vdd-hba-supply = <&gcc_ufs_phy_gdsc>; + + vcc-supply = <&L5E>; + vcc-max-microamp = <1056000>; + + vccq-supply = <&L13B>; + vccq-max-microamp = <750000>; + + vccq2-supply = <&L19B>; + vccq2-max-microamp = <750000>; + + qcom,vddp-ref-clk-supply = <&L13B>; + qcom,vddp-ref-clk-max-microamp = <100>; + + /* + * ufs-dev-types and nvmem entries are for ufs device + * identification using nvmem interface. Use number of + * ufs devices supported for ufs-dev-types, and nvmem handle + * added by pmic for sdam register. + * + * Default value taken by driver is bit[0] = 0 for 3.x and + * bit[0] = 1 for 2.x driver code takes this as default case. + * + * But Bit value to identify ufs device is not consistent + * across the targets it could be bit[0] = 0/1 for UFS2.x/3x + * and vice versa. If the bit[0] value is not same as default + * value used in driver and if its reverted then use flag + * qcom,ufs-dev-revert to identify ufs device. + */ + ufs-dev-types = <2>; + qcom,ufs-dev-revert; + nvmem-cells = <&ufs_dev>, <&boot_config>; + nvmem-cell-names = "ufs_dev", "boot_conf"; + + status = "ok"; +};