From 3b0edfe4e079d136ae03c67d9894670f4fdaaa4a Mon Sep 17 00:00:00 2001
From: Pankaj Gupta <gpankaj@qti.qualcomm.com>
Date: Wed, 12 Apr 2023 18:55:02 +0530
Subject: [PATCH] ARM: dts: msm: Add GPU frequencies with ACD DVM values for
 neo

Add frequencies with ACD DVM values for neo GPU.

Change-Id: Id44175fe2ea1f0536af9d433a0cf315ee7b1ad44
---
 qcom/neo-gpu.dtsi | 151 +++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 141 insertions(+), 10 deletions(-)

diff --git a/qcom/neo-gpu.dtsi b/qcom/neo-gpu.dtsi
index ac3b772c..42c8071d 100644
--- a/qcom/neo-gpu.dtsi
+++ b/qcom/neo-gpu.dtsi
@@ -41,7 +41,6 @@
 		qcom,ubwc-mode = <3>;
 
 		qcom,no-nap;
-		qcom,initial-pwrlevel = <0>;
 
 		interconnects = <&gem_noc MASTER_GFX3D &mc_virt SLAVE_EBI1>;
 		interconnect-names = "gpu_icc_path";
@@ -68,20 +67,152 @@
 			memory-region = <&gpu_microcode_mem>;
 		};
 
-		qcom,gpu-pwrlevels {
+		/*
+		 * Speed-bin zero is default speed bin.
+		 * For rest of the speed bins, speed-bin value
+		 * is calculated as FMAX/4.8 MHz round up to zero
+		 * decimal places plus two margin to account for
+		 * clock jitters.
+		 */
+		qcom,gpu-pwrlevel-bins {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
-			compatible = "qcom,gpu-pwrlevels";
+			compatible = "qcom,gpu-pwrlevel-bins";
 
-			qcom,gpu-pwrlevel@0 {
-				reg = <0>;
-				qcom,gpu-freq = <320000000>;
-				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+			qcom,gpu-pwrlevels-0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
 
-				qcom,bus-freq = <6>;
-				qcom,bus-min = <6>;
-				qcom,bus-max = <8>;
+				qcom,speed-bin = <0>;
+
+				qcom,initial-pwrlevel = <5>;
+
+				/* TURBO_L1 */
+				qcom,gpu-pwrlevel@0 {
+					reg = <0>;
+					qcom,gpu-freq = <843000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
+					qcom,bus-freq = <11>;
+					qcom,bus-min = <10>;
+					qcom,bus-max = <11>;
+
+					qcom,acd-level = <0xA82E5FFD>;
+				};
+
+				/* TURBO */
+				qcom,gpu-pwrlevel@1 {
+					reg = <1>;
+					qcom,gpu-freq = <780000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
+					qcom,bus-freq = <10>;
+					qcom,bus-min = <9>;
+					qcom,bus-max = <11>;
+
+					qcom,acd-level = <0xC0285FFD>;
+				};
+
+				/* NOM */
+				qcom,gpu-pwrlevel@2 {
+					reg = <2>;
+					qcom,gpu-freq = <644000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
+					qcom,bus-freq = <9>;
+					qcom,bus-min = <7>;
+					qcom,bus-max = <11>;
+
+					qcom,acd-level = <0xC0285FFD>;
+				};
+
+				/* SVS_L1 */
+				qcom,gpu-pwrlevel@3 {
+					reg = <3>;
+					qcom,gpu-freq = <570000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+					qcom,bus-freq = <7>;
+					qcom,bus-min = <6>;
+					qcom,bus-max = <10>;
+
+					qcom,acd-level = <0xC0285FFD>;
+				};
+
+				/* SVS */
+				qcom,gpu-pwrlevel@4 {
+					reg = <4>;
+					qcom,gpu-freq = <450000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
+					qcom,bus-freq = <6>;
+					qcom,bus-min = <6>;
+					qcom,bus-max = <9>;
+
+					qcom,acd-level = <0xC0285FFD>;
+				};
+
+				/* LOW SVS */
+				qcom,gpu-pwrlevel@5 {
+					reg = <5>;
+					qcom,gpu-freq = <320000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+					qcom,bus-freq = <6>;
+					qcom,bus-min = <6>;
+					qcom,bus-max = <8>;
+				};
+
+			};
+
+			qcom,gpu-pwrlevels-1 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				qcom,speed-bin = <137>;
+
+				qcom,initial-pwrlevel = <3>;
+
+				/* NOM */
+				qcom,gpu-pwrlevel@0 {
+					reg = <0>;
+					qcom,gpu-freq = <644000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
+					qcom,bus-freq = <11>;
+					qcom,bus-min = <8>;
+					qcom,bus-max = <11>;
+
+					qcom,acd-level = <0xC0285FFD>;
+				};
+
+				/* SVS_L1 */
+				qcom,gpu-pwrlevel@1 {
+					reg = <1>;
+					qcom,gpu-freq = <570000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+					qcom,bus-freq = <7>;
+					qcom,bus-min = <6>;
+					qcom,bus-max = <10>;
+
+					qcom,acd-level = <0xC0285FFD>;
+				};
+
+				/* SVS */
+				qcom,gpu-pwrlevel@2 {
+					reg = <2>;
+					qcom,gpu-freq = <450000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
+					qcom,bus-freq = <6>;
+					qcom,bus-min = <6>;
+					qcom,bus-max = <9>;
+
+					qcom,acd-level = <0xC0285FFD>;
+				};
+
+				/* LOW SVS */
+				qcom,gpu-pwrlevel@3 {
+					reg = <3>;
+					qcom,gpu-freq = <320000000>;
+					qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+					qcom,bus-freq = <6>;
+					qcom,bus-min = <6>;
+					qcom,bus-max = <8>;
+				};
 			};
 		};
 	};