From 7d7011ca5f130f5489a8d877f3c410a9a6a62b0d Mon Sep 17 00:00:00 2001 From: Maulik Shah Date: Thu, 2 Apr 2020 18:55:20 +0530 Subject: [PATCH 1/3] ARM: dts: msm: Update PDC node for sm8150 Update PDC node to add missing properties like pdc ranges, spi cfg register and add it as wakeup parent to TLMM. Change-Id: I64b1ae4781cf59bb58a930e317ad98aa75c9b19e --- qcom/sm8150-pinctrl.dtsi | 1 + qcom/sm8150.dtsi | 9 +++++---- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/qcom/sm8150-pinctrl.dtsi b/qcom/sm8150-pinctrl.dtsi index 1953e8ad..dbd1d932 100644 --- a/qcom/sm8150-pinctrl.dtsi +++ b/qcom/sm8150-pinctrl.dtsi @@ -12,6 +12,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + wakeup-parent = <&pdc>; ufs_dev_reset_assert: ufs_dev_reset_assert { config { diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi index ae6fdd5a..9edb2119 100644 --- a/qcom/sm8150.dtsi +++ b/qcom/sm8150.dtsi @@ -579,10 +579,11 @@ interrupt-parent = <&intc>; }; - pdc: interrupt-controller@0xb220000 { - compatible = "qcom,pdc-sm8150"; - reg = <0xb220000 0x400>; - #interrupt-cells = <3>; + pdc: interrupt-controller@b220000 { + compatible = "qcom,sm8150-pdc"; + reg = <0xb220000 0x30000>, <0x17c000f0 0x64>; + qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; + #interrupt-cells = <2>; interrupt-parent = <&intc>; interrupt-controller; }; From 47899a78929f66924c46522ca1eb3a168d236081 Mon Sep 17 00:00:00 2001 From: Maulik Shah Date: Thu, 2 Apr 2020 19:08:47 +0530 Subject: [PATCH 2/3] ARM: dts: msm: Update RSC nodes for sm8150 Add disp_rsc node, Correct number of TCSes in apps_rsc and Add system_pm as child of apps_rsc. Change-Id: I15498c2188c63df3b5178346010533c00ec94bfc --- qcom/sm8150.dtsi | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi index 9edb2119..03a45d0c 100644 --- a/qcom/sm8150.dtsi +++ b/qcom/sm8150.dtsi @@ -674,9 +674,9 @@ qcom,tcs-offset = <0xd00>; qcom,drv-id = <2>; qcom,tcs-config = , - , - , - ; + , + , + ; rpmhcc: clock-controller { compatible = "qcom,sm8150-rpmh-clk"; @@ -685,6 +685,25 @@ clocks = <&xo_board>; status = "okay"; }; + + system_pm { + compatible = "qcom,system-pm"; + }; + }; + + disp_rsc: rsc@af20000 { + label = "disp_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0xaf20000 0x10000>; + reg-names = "drv-0"; + interrupts = ; + qcom,tcs-offset = <0x1c00>; + qcom,drv-id = <0>; + qcom,tcs-config = , + , + , + ; + }; gcc: clock-controller@100000 { From 71a32a0d12ed697510a3e4b5c2afcd06adb8749c Mon Sep 17 00:00:00 2001 From: Maulik Shah Date: Thu, 2 Apr 2020 19:22:17 +0530 Subject: [PATCH 3/3] ARM: dts: msm: Add LPM support for sm8150 Add PSCI and cpuidle states required for LPMs and add bindings for RPMH, Master stats. Change-Id: I0733490083505069254ecb1c286518e6f6aabe2d --- qcom/sm8150-pm.dtsi | 123 ++++++++++++++++++++++++++++++++++++++++++++ qcom/sm8150.dtsi | 9 ++++ 2 files changed, 132 insertions(+) create mode 100644 qcom/sm8150-pm.dtsi diff --git a/qcom/sm8150-pm.dtsi b/qcom/sm8150-pm.dtsi new file mode 100644 index 00000000..45650837 --- /dev/null +++ b/qcom/sm8150-pm.dtsi @@ -0,0 +1,123 @@ +&soc { + qcom,lpm-levels { + compatible = "qcom,lpm-levels"; + #address-cells = <1>; + #size-cells = <0>; + + qcom,pm-cluster@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + idle-state-name = "L3"; + qcom,clstr-tmr-add = <1000>; + qcom,psci-mode-shift = <4>; + qcom,psci-mode-mask = <0xfff>; + + CLUSTER_WFI: qcom,pm-cluster-level@0 { /* D1 */ + reg = <0>; + compatible = "arm,idle-state"; + idle-state-name = "l3-wfi"; + entry-latency-us = <48>; + exit-latency-us = <51>; + min-residency-us = <99>; + arm,psci-suspend-param = <0x10>; + qcom,psci-mode = <0x1>; + }; + + LLCC_OFF: qcom,pm-cluster-level@1 { /* AOSS sleep */ + reg = <1>; + compatible = "arm,idle-state"; + idle-state-name = "llcc-off"; + entry-latency-us = <3263>; + exit-latency-us = <6562>; + min-residency-us = <9987>; + arm,psci-suspend-param = <0xc240>; + qcom,psci-mode = <0xc24>; + qcom,is-reset; + qcom,notify-rpm; + qcom,min-child-idx = <1>; + }; + + qcom,pm-cpu@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + qcom,psci-mode-shift = <0>; + qcom,psci-mode-mask = <0xf>; + qcom,ref-stddev = <500>; + qcom,tmr-add = <1000>; + qcom,ref-premature-cnt = <1>; + qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>; + + SLVR_WFI: qcom,pm-cpu-level@0 { /* C1 */ + reg = <0>; + compatible = "arm,idle-state"; + idle-state-name = "wfi"; + entry-latency-us = <57>; + exit-latency-us = <43>; + min-residency-us = <100>; + arm,psci-suspend-param = <0x1>; + qcom,psci-cpu-mode = <0x1>; + }; + + SLVR_RAIL_OFF: qcom,pm-cpu-level@1 { /* C4 */ + reg = <1>; + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <355>; + exit-latency-us = <909>; + min-residency-us = <3934>; + arm,psci-suspend-param = <0x40000004>; + qcom,psci-cpu-mode = <0x4>; + local-timer-stop; + qcom,is-reset; + qcom,use-broadcast-timer; + }; + }; + + qcom,pm-cpu@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + qcom,psci-mode-shift = <0>; + qcom,psci-mode-mask = <0xf>; + qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>; + + GOLD_WFI: qcom,pm-cpu-level@0 { /* C1 */ + reg = <0>; + compatible = "arm,idle-state"; + idle-state-name = "wfi"; + entry-latency-us = <57>; + exit-latency-us = <43>; + min-residency-us = <83>; + arm,psci-suspend-param = <0x1>; + qcom,psci-cpu-mode = <0x1>; + }; + + GOLD_RAIL_OFF: qcom,pm-cpu-level@1 { /* C4 */ + reg = <1>; + compatible = "arm,idle-state"; + idle-state-name = "rail-pc"; + entry-latency-us = <2411>; + exit-latency-us = <1461>; + min-residency-us = <4488>; + arm,psci-suspend-param = <0x40000004>; + qcom,psci-cpu-mode = <0x4>; + local-timer-stop; + qcom,is-reset; + qcom,use-broadcast-timer; + }; + }; + }; + }; + + rpmh-master-stats@b221200 { + compatible = "qcom,rpmh-master-stats-v1"; + reg = <0xb221200 0x60>; + }; + + soc-sleep-stats@c3f0000 { + compatible = "qcom,rpmh-sleep-stats"; + reg = <0xc3f0000 0x400>; + }; +}; diff --git a/qcom/sm8150.dtsi b/qcom/sm8150.dtsi index 03a45d0c..ff5b2b88 100644 --- a/qcom/sm8150.dtsi +++ b/qcom/sm8150.dtsi @@ -26,6 +26,7 @@ compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <&SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_0>; @@ -62,6 +63,7 @@ compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = <&SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_1>; @@ -92,6 +94,7 @@ compatible = "arm,armv8"; reg = <0x0 0x200>; enable-method = "psci"; + cpu-idle-states = <&SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_2>; @@ -122,6 +125,7 @@ compatible = "arm,armv8"; reg = <0x0 0x300>; enable-method = "psci"; + cpu-idle-states = <&SLVR_RAIL_OFF>; capacity-dmips-mhz = <1024>; cache-size = <0x8000>; next-level-cache = <&L2_3>; @@ -152,6 +156,7 @@ compatible = "arm,armv8"; reg = <0x0 0x400>; enable-method = "psci"; + cpu-idle-states = <&GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; cache-size = <0x20000>; next-level-cache = <&L2_4>; @@ -191,6 +196,7 @@ compatible = "arm,armv8"; reg = <0x0 0x500>; enable-method = "psci"; + cpu-idle-states = <&GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; cache-size = <0x20000>; next-level-cache = <&L2_5>; @@ -230,6 +236,7 @@ compatible = "arm,armv8"; reg = <0x0 0x600>; enable-method = "psci"; + cpu-idle-states = <&GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; cache-size = <0x20000>; next-level-cache = <&L2_6>; @@ -269,6 +276,7 @@ compatible = "arm,armv8"; reg = <0x0 0x700>; enable-method = "psci"; + cpu-idle-states = <&GOLD_RAIL_OFF>; capacity-dmips-mhz = <1740>; cache-size = <0x20000>; next-level-cache = <&L2_7>; @@ -743,3 +751,4 @@ #include "sm8150-pinctrl.dtsi" #include "sm8150-regulator.dtsi" +#include "sm8150-pm.dtsi"